diff options
| author | Rafael Espindola <rafael.espindola@gmail.com> | 2006-09-11 17:25:40 +0000 |
|---|---|---|
| committer | Rafael Espindola <rafael.espindola@gmail.com> | 2006-09-11 17:25:40 +0000 |
| commit | 7cca7c531773f763c1bddc3fefecc99ba56ed10a (patch) | |
| tree | 16b5f4d683bb9564f90a8989d90c40b698969a3c /lib/Target/ARM/ARMRegisterInfo.cpp | |
| parent | 3fc68ccd83d885d500f8d43cd5a7ac962a29b1e7 (diff) | |
partial implementation of the ARM Addressing Mode 1
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30252 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/ARM/ARMRegisterInfo.cpp')
| -rw-r--r-- | lib/Target/ARM/ARMRegisterInfo.cpp | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/lib/Target/ARM/ARMRegisterInfo.cpp b/lib/Target/ARM/ARMRegisterInfo.cpp index 9e6708141a..d5f6caaa4c 100644 --- a/lib/Target/ARM/ARMRegisterInfo.cpp +++ b/lib/Target/ARM/ARMRegisterInfo.cpp @@ -48,7 +48,7 @@ void ARMRegisterInfo::copyRegToReg(MachineBasicBlock &MBB, unsigned DestReg, unsigned SrcReg, const TargetRegisterClass *RC) const { assert (RC == ARM::IntRegsRegisterClass); - BuildMI(MBB, I, ARM::movrr, 1, DestReg).addReg(SrcReg); + BuildMI(MBB, I, ARM::MOV, 1, DestReg).addReg(SrcReg); } MachineInstr *ARMRegisterInfo::foldMemoryOperand(MachineInstr* MI, @@ -114,7 +114,7 @@ ARMRegisterInfo::eliminateFrameIndex(MachineBasicBlock::iterator II) const { // Insert a set of r12 with the full address // r12 = r13 + offset MachineBasicBlock *MBB2 = MI.getParent(); - BuildMI(*MBB2, II, ARM::addri, 2, ARM::R12).addReg(ARM::R13).addImm(Offset); + BuildMI(*MBB2, II, ARM::ADD, 2, ARM::R12).addReg(ARM::R13).addImm(Offset); // Replace the FrameIndex with r12 MI.getOperand(FrameIdx).ChangeToRegister(ARM::R12, false); @@ -140,7 +140,7 @@ void ARMRegisterInfo::emitPrologue(MachineFunction &MF) const { MFI->setStackSize(NumBytes); //sub sp, sp, #NumBytes - BuildMI(MBB, MBBI, ARM::subri, 2, ARM::R13).addReg(ARM::R13).addImm(NumBytes); + BuildMI(MBB, MBBI, ARM::SUB, 2, ARM::R13).addReg(ARM::R13).addImm(NumBytes); } void ARMRegisterInfo::emitEpilogue(MachineFunction &MF, @@ -153,7 +153,7 @@ void ARMRegisterInfo::emitEpilogue(MachineFunction &MF, int NumBytes = (int) MFI->getStackSize(); //add sp, sp, #NumBytes - BuildMI(MBB, MBBI, ARM::addri, 2, ARM::R13).addReg(ARM::R13).addImm(NumBytes); + BuildMI(MBB, MBBI, ARM::ADD, 2, ARM::R13).addReg(ARM::R13).addImm(NumBytes); } unsigned ARMRegisterInfo::getRARegister() const { |