diff options
| author | Owen Anderson <resistor@mac.com> | 2010-12-08 00:18:36 +0000 |
|---|---|---|
| committer | Owen Anderson <resistor@mac.com> | 2010-12-08 00:18:36 +0000 |
| commit | d8e351b96f5fd7007fbdd636acaa1fc9f6e18f3c (patch) | |
| tree | 0c76b83a6946f82c9a16aff12aad8823ae11c93a /lib/Target/ARM/ARMMCCodeEmitter.cpp | |
| parent | e113ae56d9ee2fddce14f5caaae1229e70ee0a00 (diff) | |
VLDR fixups need special handling under Thumb. While the encoding is the same,
the order of the bytes in the data stream is flipped around.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121215 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/ARM/ARMMCCodeEmitter.cpp')
| -rw-r--r-- | lib/Target/ARM/ARMMCCodeEmitter.cpp | 8 |
1 files changed, 7 insertions, 1 deletions
diff --git a/lib/Target/ARM/ARMMCCodeEmitter.cpp b/lib/Target/ARM/ARMMCCodeEmitter.cpp index 229e00e65d..ba1f6d30ca 100644 --- a/lib/Target/ARM/ARMMCCodeEmitter.cpp +++ b/lib/Target/ARM/ARMMCCodeEmitter.cpp @@ -48,6 +48,7 @@ public: // name off bits flags { "fixup_arm_ldst_pcrel_12", 1, 24, MCFixupKindInfo::FKF_IsPCRel }, { "fixup_arm_pcrel_10", 1, 24, MCFixupKindInfo::FKF_IsPCRel }, + { "fixup_t2_pcrel_10", 0, 32, MCFixupKindInfo::FKF_IsPCRel }, { "fixup_arm_adr_pcrel_12", 1, 24, MCFixupKindInfo::FKF_IsPCRel }, { "fixup_arm_branch", 1, 24, MCFixupKindInfo::FKF_IsPCRel }, { "fixup_arm_thumb_bl", 0, 32, MCFixupKindInfo::FKF_IsPCRel }, @@ -737,7 +738,12 @@ getAddrMode5OpValue(const MCInst &MI, unsigned OpIdx, assert(MO.isExpr() && "Unexpected machine operand type!"); const MCExpr *Expr = MO.getExpr(); - MCFixupKind Kind = MCFixupKind(ARM::fixup_arm_pcrel_10); + MCFixupKind Kind; + const ARMSubtarget &Subtarget = TM.getSubtarget<ARMSubtarget>(); + if (Subtarget.isThumb2()) + Kind = MCFixupKind(ARM::fixup_t2_pcrel_10); + else + Kind = MCFixupKind(ARM::fixup_arm_pcrel_10); Fixups.push_back(MCFixup::Create(0, Expr, Kind)); ++MCNumCPRelocations; |