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| author | Evan Cheng <evan.cheng@apple.com> | 2010-10-22 21:29:58 +0000 |
|---|---|---|
| committer | Evan Cheng <evan.cheng@apple.com> | 2010-10-22 21:29:58 +0000 |
| commit | b179b46cc558c720d23a066c768bad71f975eb93 (patch) | |
| tree | 8a7a1c856c4b08f75e467a55e3fb61c052dfed24 /lib/Target/ARM/ARMLoadStoreOptimizer.cpp | |
| parent | 458509476bd0f9911965de3b550d3f9c43303b0b (diff) | |
Transfer implicit ops when forming load multiple and return instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117151 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/ARM/ARMLoadStoreOptimizer.cpp')
| -rw-r--r-- | lib/Target/ARM/ARMLoadStoreOptimizer.cpp | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/lib/Target/ARM/ARMLoadStoreOptimizer.cpp b/lib/Target/ARM/ARMLoadStoreOptimizer.cpp index a7d1d9f3fb..6b9e75f95d 100644 --- a/lib/Target/ARM/ARMLoadStoreOptimizer.cpp +++ b/lib/Target/ARM/ARMLoadStoreOptimizer.cpp @@ -1196,6 +1196,7 @@ bool ARMLoadStoreOpt::MergeReturnIntoLDM(MachineBasicBlock &MBB) { unsigned NewOpc = isThumb2 ? ARM::t2LDM_RET : ARM::LDM_RET; PrevMI->setDesc(TII->get(NewOpc)); MO.setReg(ARM::PC); + PrevMI->copyImplicitOps(&*MBBI); MBB.erase(MBBI); return true; } |