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| author | Evan Cheng <evan.cheng@apple.com> | 2010-11-12 23:03:38 +0000 |
|---|---|---|
| committer | Evan Cheng <evan.cheng@apple.com> | 2010-11-12 23:03:38 +0000 |
| commit | 893d7fe2098cc81ba1b4ce0ed71f6f614843961f (patch) | |
| tree | 335627272ec83d12ec49206fe935e07b23dc3927 /lib/Target/ARM/ARMInstrInfo.h | |
| parent | c0394c0b8cee513a624566ce1db100bd66d4da57 (diff) | |
Eliminate ARM::MOVi2pieces. Just use MOVi32imm and expand it to either movi+orr or movw+movt depending on the subtarget.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118938 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/ARM/ARMInstrInfo.h')
| -rw-r--r-- | lib/Target/ARM/ARMInstrInfo.h | 5 |
1 files changed, 0 insertions, 5 deletions
diff --git a/lib/Target/ARM/ARMInstrInfo.h b/lib/Target/ARM/ARMInstrInfo.h index 4563ffea7b..f2c7bdc31b 100644 --- a/lib/Target/ARM/ARMInstrInfo.h +++ b/lib/Target/ARM/ARMInstrInfo.h @@ -32,11 +32,6 @@ public: // if there is not such an opcode. unsigned getUnindexedOpcode(unsigned Opc) const; - void reMaterialize(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, - unsigned DestReg, unsigned SubIdx, - const MachineInstr *Orig, - const TargetRegisterInfo &TRI) const; - /// getRegisterInfo - TargetInstrInfo is a superset of MRegister info. As /// such, whenever a client has an instance of instruction info, it should /// always be able to get register info as well (through this method). |