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| author | Evan Cheng <evan.cheng@apple.com> | 2009-06-29 07:51:04 +0000 |
|---|---|---|
| committer | Evan Cheng <evan.cheng@apple.com> | 2009-06-29 07:51:04 +0000 |
| commit | 055b0310f862b91f33699037ce67d3ab8137c20c (patch) | |
| tree | 6924272e732298bf99146b69c12f9029a5e1adc5 /lib/Target/ARM/ARMInstrInfo.h | |
| parent | 95c1f5ba64e7ad505781235839b65a2a8f64a733 (diff) | |
Implement Thumb2 ldr.
After much back and forth, I decided to deviate from ARM design and split LDR into 4 instructions (r + imm12, r + imm8, r + r << imm12, constantpool). The advantage of this is 1) it follows the latest ARM technical manual, and 2) makes it easier to reduce the width of the instruction later. The down side is this creates more inconsistency between the two sub-targets. We should split ARM LDR instruction in a similar fashion later. I've added a README entry for this.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74420 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/ARM/ARMInstrInfo.h')
| -rw-r--r-- | lib/Target/ARM/ARMInstrInfo.h | 12 |
1 files changed, 8 insertions, 4 deletions
diff --git a/lib/Target/ARM/ARMInstrInfo.h b/lib/Target/ARM/ARMInstrInfo.h index 7e3aa6c7a3..ac1eec0921 100644 --- a/lib/Target/ARM/ARMInstrInfo.h +++ b/lib/Target/ARM/ARMInstrInfo.h @@ -39,10 +39,14 @@ namespace ARMII { AddrMode3 = 3, AddrMode4 = 4, AddrMode5 = 5, - AddrModeT1 = 6, - AddrModeT2 = 7, - AddrModeT4 = 8, - AddrModeTs = 9, // i8 * 4 for pc and sp relative data + AddrModeT1_1 = 6, + AddrModeT1_2 = 7, + AddrModeT1_4 = 8, + AddrModeT1_s = 9, // i8 * 4 for pc and sp relative data + AddrModeT2_i12= 10, + AddrModeT2_i8 = 11, + AddrModeT2_so = 12, + AddrModeT2_pc = 13, // +/- i12 for pc relative data // Size* - Flags to keep track of the size of an instruction. SizeShift = 4, |