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authorArnold Schwaighofer <arnolds@codeaurora.org>2012-08-09 15:25:52 +0000
committerArnold Schwaighofer <arnolds@codeaurora.org>2012-08-09 15:25:52 +0000
commitbcc4c1d2d1b6877418de92835c537d79d44363a6 (patch)
treed24efac44649b84554da2f2e97256dce39f4a074 /lib/Target/ARM/ARMISelLowering.h
parent0b66bd9b078c99dfca6ba0836750cdc168f635d1 (diff)
Patch to implement UMLAL/SMLAL instructions for the ARM architecture
This patch corrects the definition of umlal/smlal instructions and adds support for matching them to the ARM dag combiner. Bug 12213 Patch by Yin Ma! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161581 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/ARM/ARMISelLowering.h')
-rw-r--r--lib/Target/ARM/ARMISelLowering.h3
1 files changed, 3 insertions, 0 deletions
diff --git a/lib/Target/ARM/ARMISelLowering.h b/lib/Target/ARM/ARMISelLowering.h
index 213af20ebd..8faadfd831 100644
--- a/lib/Target/ARM/ARMISelLowering.h
+++ b/lib/Target/ARM/ARMISelLowering.h
@@ -176,6 +176,9 @@ namespace llvm {
VMULLs, // ...signed
VMULLu, // ...unsigned
+ UMLAL, // 64bit Unsigned Accumulate Multiply
+ SMLAL, // 64bit Signed Accumulate Multiply
+
// Operands of the standard BUILD_VECTOR node are not legalized, which
// is fine if BUILD_VECTORs are always lowered to shuffles or other
// operations, but for ARM some BUILD_VECTORs are legal as-is and their