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authorOwen Anderson <resistor@mac.com>2011-04-05 23:03:06 +0000
committerOwen Anderson <resistor@mac.com>2011-04-05 23:03:06 +0000
commit493cba1b32ebd4064e56a2387099b790c8c32c0c (patch)
treeb77adc2eff8d2e354737426e5ecbb5b52f28ca1b /lib/Target/ARM/ARMISelLowering.cpp
parentc3281c10c94185e18338764b225a730a7c3e3ec4 (diff)
Revert r128946 while I figure out why it broke the buildbots.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128951 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/ARM/ARMISelLowering.cpp')
-rw-r--r--lib/Target/ARM/ARMISelLowering.cpp22
1 files changed, 1 insertions, 21 deletions
diff --git a/lib/Target/ARM/ARMISelLowering.cpp b/lib/Target/ARM/ARMISelLowering.cpp
index 6ff57522f0..21fe9620c0 100644
--- a/lib/Target/ARM/ARMISelLowering.cpp
+++ b/lib/Target/ARM/ARMISelLowering.cpp
@@ -5029,12 +5029,7 @@ ARMTargetLowering::EmitInstrWithCustomInserter(MachineInstr *MI,
case ARM::ADCSSrs:
case ARM::SBCSSri:
case ARM::SBCSSrr:
- case ARM::SBCSSrs:
- case ARM::RSBSri:
- case ARM::RSBSrr:
- case ARM::RSBSrs:
- case ARM::RSCSri:
- case ARM::RSCSrs: {
+ case ARM::SBCSSrs: {
unsigned OldOpc = MI->getOpcode();
unsigned Opc = 0;
switch (OldOpc) {
@@ -5056,21 +5051,6 @@ ARMTargetLowering::EmitInstrWithCustomInserter(MachineInstr *MI,
case ARM::SBCSSrs:
Opc = ARM::SBCrs;
break;
- case ARM::RSBSri:
- Opc = ARM::RSBri;
- break;
- case ARM::RSBSrr:
- Opc = ARM::RSBrr;
- break;
- case ARM::RSBSrs:
- Opc = ARM::RSBrs;
- break;
- case ARM::RSCSri:
- Opc = ARM::RSCri;
- break;
- case ARM::RSCSrs:
- Opc = ARM::RSCrs;
- break;
default:
llvm_unreachable("Unknown opcode?");
}