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authorKaelyn Uhrain <rikka@google.com>2012-10-26 23:28:41 +0000
committerKaelyn Uhrain <rikka@google.com>2012-10-26 23:28:41 +0000
commit61fac6810ff8686c5302dedb35d52cc662a983fe (patch)
tree75889259aca9a7185fce5e14b0b8fe1d2e3042c9 /lib/Target/ARM/ARMFrameLowering.cpp
parent96e6da4841368bbb3ae73736dc523c5b1d48b1c4 (diff)
Avoid an unused-variable warning when asserts are disabled.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166834 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/ARM/ARMFrameLowering.cpp')
-rw-r--r--lib/Target/ARM/ARMFrameLowering.cpp3
1 files changed, 1 insertions, 2 deletions
diff --git a/lib/Target/ARM/ARMFrameLowering.cpp b/lib/Target/ARM/ARMFrameLowering.cpp
index 4d8dafc01e..9392497fd0 100644
--- a/lib/Target/ARM/ARMFrameLowering.cpp
+++ b/lib/Target/ARM/ARMFrameLowering.cpp
@@ -349,7 +349,6 @@ void ARMFrameLowering::emitEpilogue(MachineFunction &MF,
unsigned RetOpcode = MBBI->getOpcode();
DebugLoc dl = MBBI->getDebugLoc();
MachineFrameInfo *MFI = MF.getFrameInfo();
- MachineRegisterInfo &MRI = MF.getRegInfo();
ARMFunctionInfo *AFI = MF.getInfo<ARMFunctionInfo>();
const TargetRegisterInfo *RegInfo = MF.getTarget().getRegisterInfo();
const ARMBaseInstrInfo &TII =
@@ -402,7 +401,7 @@ void ARMFrameLowering::emitEpilogue(MachineFunction &MF,
// This is bad, if an interrupt is taken after the mov, sp is in an
// inconsistent state.
// Use the first callee-saved register as a scratch register.
- assert(MRI.isPhysRegUsed(ARM::R4) &&
+ assert(MF.getRegInfo().isPhysRegUsed(ARM::R4) &&
"No scratch register to restore SP from FP!");
emitT2RegPlusImmediate(MBB, MBBI, dl, ARM::R4, FramePtr, -NumBytes,
ARMCC::AL, 0, TII);