diff options
author | Eric Christopher <echristo@apple.com> | 2010-11-30 19:14:07 +0000 |
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committer | Eric Christopher <echristo@apple.com> | 2010-11-30 19:14:07 +0000 |
commit | 06a86da3238d9f2234cb7eb7ca6bdc73b65bc408 (patch) | |
tree | 4e7c9ab73ed1370c03c2bc9df0709d87a5da4ea2 /lib/Target/ARM/ARMFastISel.cpp | |
parent | 55ee75d57114c17460d364121a2ec3a5cf40e1d2 (diff) |
Noticed this on inspection, fix and update some comments.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120447 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/ARM/ARMFastISel.cpp')
-rw-r--r-- | lib/Target/ARM/ARMFastISel.cpp | 7 |
1 files changed, 4 insertions, 3 deletions
diff --git a/lib/Target/ARM/ARMFastISel.cpp b/lib/Target/ARM/ARMFastISel.cpp index 50ec370d7f..1eec32248f 100644 --- a/lib/Target/ARM/ARMFastISel.cpp +++ b/lib/Target/ARM/ARMFastISel.cpp @@ -933,12 +933,13 @@ bool ARMFastISel::ARMEmitStore(EVT VT, unsigned SrcReg, Address &Addr) { MachineMemOperand::MOLoad, MFI.getObjectSize(FI), MFI.getObjectAlignment(FI)); - // LDRH needs an additional operand. + // ARM::STRH needs an additional operand. if (!isThumb && VT.getSimpleVT().SimpleTy == MVT::i16) AddOptionalDefs(BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DL, TII.get(StrOpc)) .addReg(SrcReg, getKillRegState(true)) - .addFrameIndex(FI).addImm(Offset).addMemOperand(MMO)); + .addFrameIndex(FI).addReg(0).addImm(Offset) + .addMemOperand(MMO)); else AddOptionalDefs(BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DL, TII.get(StrOpc)) @@ -948,7 +949,7 @@ bool ARMFastISel::ARMEmitStore(EVT VT, unsigned SrcReg, Address &Addr) { return true; } - // ARM::LDRH needs an additional operand. + // ARM::STRH needs an additional operand. if (!isThumb && VT.getSimpleVT().SimpleTy == MVT::i16) AddOptionalDefs(BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DL, TII.get(StrOpc)) |