diff options
| author | Andrew Trick <atrick@apple.com> | 2012-08-29 04:41:37 +0000 |
|---|---|---|
| committer | Andrew Trick <atrick@apple.com> | 2012-08-29 04:41:37 +0000 |
| commit | 7611a88b58e0a6960cdb5c72dc18a6c93e44cdc2 (patch) | |
| tree | 5b359816884b44eaec52d4b8670e3cf733f85571 /lib/Target/ARM/ARMBaseInstrInfo.cpp | |
| parent | 2b70dfaaebcc436c53b2c86cd8a9574baba47253 (diff) | |
Cleanup sloppy code. Jakob's review.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162825 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/ARM/ARMBaseInstrInfo.cpp')
| -rw-r--r-- | lib/Target/ARM/ARMBaseInstrInfo.cpp | 7 |
1 files changed, 3 insertions, 4 deletions
diff --git a/lib/Target/ARM/ARMBaseInstrInfo.cpp b/lib/Target/ARM/ARMBaseInstrInfo.cpp index f3c9cf4e43..4f203eac56 100644 --- a/lib/Target/ARM/ARMBaseInstrInfo.cpp +++ b/lib/Target/ARM/ARMBaseInstrInfo.cpp @@ -683,7 +683,7 @@ void ARMBaseInstrInfo::copyPhysReg(MachineBasicBlock &MBB, // Handle register classes that require multiple instructions. unsigned BeginIdx = 0; unsigned SubRegs = 0; - unsigned Spacing = 1; + int Spacing = 1; // Use VORRq when possible. if (ARM::QQPRRegClass.contains(DestReg, SrcReg)) @@ -705,8 +705,7 @@ void ARMBaseInstrInfo::copyPhysReg(MachineBasicBlock &MBB, else if (ARM::DQuadSpcRegClass.contains(DestReg, SrcReg)) Opc = ARM::VMOVD, BeginIdx = ARM::dsub_0, SubRegs = 4, Spacing = 2; - if (!Opc) - llvm_unreachable("Impossible reg-to-reg copy"); + assert(Opc && "Impossible reg-to-reg copy"); const TargetRegisterInfo *TRI = &getRegisterInfo(); MachineInstrBuilder Mov; @@ -724,8 +723,8 @@ void ARMBaseInstrInfo::copyPhysReg(MachineBasicBlock &MBB, unsigned Src = TRI->getSubReg(SrcReg, BeginIdx + i*Spacing); assert(Dst && Src && "Bad sub-register"); #ifndef NDEBUG - DstRegs.insert(Dst); assert(!DstRegs.count(Src) && "destructive vector copy"); + DstRegs.insert(Dst); #endif Mov = BuildMI(MBB, I, I->getDebugLoc(), get(Opc), Dst) .addReg(Src); |