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author | Bill Wendling <isanbard@gmail.com> | 2010-12-08 23:01:43 +0000 |
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committer | Bill Wendling <isanbard@gmail.com> | 2010-12-08 23:01:43 +0000 |
commit | dff2f7151f695b86db8c4b0c6604463bdb8a63ea (patch) | |
tree | 442b84fdbf1f7cfb6193a212d718b8dcadbde78b /lib/Target/ARM/ARMAsmBackend.cpp | |
parent | 5d9e0160256b7d5e19072f89006157ab6d28a698 (diff) |
Support the "target" encodings for the CB[N]Z instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121308 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/ARM/ARMAsmBackend.cpp')
-rw-r--r-- | lib/Target/ARM/ARMAsmBackend.cpp | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/lib/Target/ARM/ARMAsmBackend.cpp b/lib/Target/ARM/ARMAsmBackend.cpp index 51191c7ff1..1754870b95 100644 --- a/lib/Target/ARM/ARMAsmBackend.cpp +++ b/lib/Target/ARM/ARMAsmBackend.cpp @@ -145,6 +145,11 @@ static unsigned adjustFixupValue(unsigned Kind, uint64_t Value) { // 'off by 4' is implicitly handled by the half-word ordering of the // Thumb encoding, so we only need to adjust by 2 here. return ((Value - 2) >> 2) & 0xff; + case ARM::fixup_arm_thumb_br: { + // Offset by 4 and don't encode the lower bit, which is always 0. + uint32_t Binary = (Value - 4) >> 1; + return ((Binary & 0x20) << 9) | ((Binary & 0x1f) << 3); + } case ARM::fixup_arm_pcrel_10: Value = Value - 6; // ARM fixups offset by an additional word and don't // need to adjust for the half-word ordering. @@ -258,6 +263,9 @@ static unsigned getFixupKindNumBytes(unsigned Kind) { case ARM::fixup_arm_thumb_cp: return 1; + case ARM::fixup_arm_thumb_br: + return 2; + case ARM::fixup_arm_ldst_pcrel_12: case ARM::fixup_arm_pcrel_10: case ARM::fixup_arm_adr_pcrel_12: |