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| author | Evan Cheng <evan.cheng@apple.com> | 2010-08-11 06:30:38 +0000 |
|---|---|---|
| committer | Evan Cheng <evan.cheng@apple.com> | 2010-08-11 06:30:38 +0000 |
| commit | c7569ed4e43a25aa52cf3b5580f1ee00d7d5db96 (patch) | |
| tree | 3e02fdec983410b5e2dd089c16fa8f48b1a44db7 /lib/Target/ARM/ARM.td | |
| parent | 11db068721d44fd5f9b0c2a3a4c90f813d2eae9c (diff) | |
Add Cortex-M0 support. It's a ARMv6m device (no ARM mode) with some 32-bit
instructions: dmb, dsb, isb, msr, and mrs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110786 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/ARM/ARM.td')
| -rw-r--r-- | lib/Target/ARM/ARM.td | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/lib/Target/ARM/ARM.td b/lib/Target/ARM/ARM.td index d1e84cdd4a..b51b9d40e8 100644 --- a/lib/Target/ARM/ARM.td +++ b/lib/Target/ARM/ARM.td @@ -127,6 +127,9 @@ def : Processor<"arm1176jzf-s", ARMV6Itineraries, [ArchV6, FeatureVFP2]>; def : Processor<"mpcorenovfp", ARMV6Itineraries, [ArchV6]>; def : Processor<"mpcore", ARMV6Itineraries, [ArchV6, FeatureVFP2]>; +// V6M Processors. +def : Processor<"cortex-m0", ARMV6Itineraries, [ArchV6, FeatureDB]>; + // V6T2 Processors. def : Processor<"arm1156t2-s", ARMV6Itineraries, [ArchV6T2, FeatureThumb2]>; @@ -141,6 +144,8 @@ def : Processor<"cortex-a8", CortexA8Itineraries, def : Processor<"cortex-a9", CortexA9Itineraries, [ArchV7A, FeatureThumb2, FeatureNEON, FeatureT2ExtractPack, FeatureDB]>; + +// V7M Processors. def : ProcNoItin<"cortex-m3", [ArchV7M, FeatureThumb2, FeatureHWDiv, FeatureDB]>; def : ProcNoItin<"cortex-m4", [ArchV7M, FeatureThumb2, FeatureHWDiv, |