Match MachineFunction::UsedPhysRegs changes.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36452 91177308-0d34-0410-b5e6-96231b3b80d8

5 files changed, 25 insertions, 48 deletions

diff --git a/lib/CodeGen/PrologEpilogInserter.cpp b/lib/CodeGen/PrologEpilogInserter.cpp
index d1ed0bbbc3..478f3d3a5f 100644
--- a/lib/CodeGen/PrologEpilogInserter.cpp
+++ b/lib/CodeGen/PrologEpilogInserter.cpp
@@ -156,19 +156,18 @@ void PEI::calculateCalleeSavedRegisters(MachineFunction &Fn) {
   // Now figure out which *callee saved* registers are modified by the current
   // function, thus needing to be saved and restored in the prolog/epilog.
   //
-  const bool *PhysRegsUsed = Fn.getUsedPhysregs();
   const TargetRegisterClass* const *CSRegClasses =
     RegInfo->getCalleeSavedRegClasses();
   std::vector<CalleeSavedInfo> CSI;
   for (unsigned i = 0; CSRegs[i]; ++i) {
     unsigned Reg = CSRegs[i];
-    if (PhysRegsUsed[Reg]) {
+    if (Fn.isPhysRegUsed(Reg)) {
         // If the reg is modified, save it!
       CSI.push_back(CalleeSavedInfo(Reg, CSRegClasses[i]));
     } else {
       for (const unsigned *AliasSet = RegInfo->getAliasSet(Reg);
            *AliasSet; ++AliasSet) {  // Check alias registers too.
-        if (PhysRegsUsed[*AliasSet]) {
+        if (Fn.isPhysRegUsed(*AliasSet)) {
           CSI.push_back(CalleeSavedInfo(Reg, CSRegClasses[i]));
           break;
         }
diff --git a/lib/CodeGen/RegAllocLinearScan.cpp b/lib/CodeGen/RegAllocLinearScan.cpp
index f66400c535..8ad347bb7d 100644
--- a/lib/CodeGen/RegAllocLinearScan.cpp
+++ b/lib/CodeGen/RegAllocLinearScan.cpp
@@ -61,7 +61,6 @@ namespace {
     const TargetMachine* tm_;
     const MRegisterInfo* mri_;
     LiveIntervals* li_;
-    bool *PhysRegsUsed;
 
     /// handled_ - Intervals are added to the handled_ set in the order of their
     /// start value.  This is uses for backtracking.
@@ -194,10 +193,6 @@ bool RA::runOnMachineFunction(MachineFunction &fn) {
   if (RelatedRegClasses.empty())
     ComputeRelatedRegClasses();
   
-  PhysRegsUsed = new bool[mri_->getNumRegs()];
-  std::fill(PhysRegsUsed, PhysRegsUsed+mri_->getNumRegs(), false);
-  fn.setUsedPhysRegs(PhysRegsUsed);
-
   if (!prt_.get()) prt_.reset(new PhysRegTracker(*mri_));
   vrm_.reset(new VirtRegMap(*mf_));
   if (!spiller_.get()) spiller_.reset(createSpiller());
@@ -231,7 +226,7 @@ void RA::initIntervalSets()
 
   for (LiveIntervals::iterator i = li_->begin(), e = li_->end(); i != e; ++i) {
     if (MRegisterInfo::isPhysicalRegister(i->second.reg)) {
-      PhysRegsUsed[i->second.reg] = true;
+      mf_->setPhysRegUsed(i->second.reg);
       fixed_.push_back(std::make_pair(&i->second, i->second.begin()));
     } else
       unhandled_.push(&i->second);
diff --git a/lib/CodeGen/RegAllocLocal.cpp b/lib/CodeGen/RegAllocLocal.cpp
index f862023e8f..d3d5796e85 100644
--- a/lib/CodeGen/RegAllocLocal.cpp
+++ b/lib/CodeGen/RegAllocLocal.cpp
@@ -47,7 +47,6 @@ namespace {
     MachineFunction *MF;
     const MRegisterInfo *RegInfo;
     LiveVariables *LV;
-    bool *PhysRegsEverUsed;
 
     // StackSlotForVirtReg - Maps virtual regs to the frame index where these
     // values are spilled.
@@ -511,7 +510,7 @@ MachineInstr *RA::reloadVirtReg(MachineBasicBlock &MBB, MachineInstr *MI,
   RegInfo->loadRegFromStackSlot(MBB, MI, PhysReg, FrameIndex, RC);
   ++NumLoads;    // Update statistics
 
-  PhysRegsEverUsed[PhysReg] = true;
+  MF->setPhysRegUsed(PhysReg);
   MI->getOperand(OpNum).setReg(PhysReg);  // Assign the input register
   return MI;
 }
@@ -532,7 +531,7 @@ void RA::AllocateBasicBlock(MachineBasicBlock &MBB) {
     for (MachineFunction::livein_iterator I = MF->livein_begin(),
          E = MF->livein_end(); I != E; ++I) {
       unsigned Reg = I->first;
-      PhysRegsEverUsed[Reg] = true;
+      MF->setPhysRegUsed(Reg);
       PhysRegsUsed[Reg] = 0;            // It is free and reserved now
       PhysRegsUseOrder.push_back(Reg);
       for (const unsigned *AliasSet = RegInfo->getAliasSet(Reg);
@@ -540,7 +539,7 @@ void RA::AllocateBasicBlock(MachineBasicBlock &MBB) {
         if (PhysRegsUsed[*AliasSet] != -2) {
           PhysRegsUseOrder.push_back(*AliasSet);
           PhysRegsUsed[*AliasSet] = 0;  // It is free and reserved now
-          PhysRegsEverUsed[*AliasSet] = true;
+          MF->setPhysRegUsed(*AliasSet);
         }
       }
     }    
@@ -630,7 +629,7 @@ void RA::AllocateBasicBlock(MachineBasicBlock &MBB) {
         unsigned Reg = MO.getReg();
         if (PhysRegsUsed[Reg] == -2) continue;  // Something like ESP.
             
-        PhysRegsEverUsed[Reg] = true;
+        MF->setPhysRegUsed(Reg);
         spillPhysReg(MBB, MI, Reg, true); // Spill any existing value in reg
         PhysRegsUsed[Reg] = 0;            // It is free and reserved now
         PhysRegsUseOrder.push_back(Reg);
@@ -639,7 +638,7 @@ void RA::AllocateBasicBlock(MachineBasicBlock &MBB) {
           if (PhysRegsUsed[*AliasSet] != -2) {
             PhysRegsUseOrder.push_back(*AliasSet);
             PhysRegsUsed[*AliasSet] = 0;  // It is free and reserved now
-            PhysRegsEverUsed[*AliasSet] = true;
+            MF->setPhysRegUsed(*AliasSet);
           }
         }
       }
@@ -656,7 +655,7 @@ void RA::AllocateBasicBlock(MachineBasicBlock &MBB) {
           PhysRegsUseOrder.push_back(Reg);
           PhysRegsUsed[Reg] = 0;            // It is free and reserved now
         }
-        PhysRegsEverUsed[Reg] = true;
+        MF->setPhysRegUsed(Reg);
 
         for (const unsigned *AliasSet = RegInfo->getAliasSet(Reg);
              *AliasSet; ++AliasSet) {
@@ -665,7 +664,7 @@ void RA::AllocateBasicBlock(MachineBasicBlock &MBB) {
               PhysRegsUseOrder.push_back(*AliasSet);
               PhysRegsUsed[*AliasSet] = 0;  // It is free and reserved now
             }
-            PhysRegsEverUsed[*AliasSet] = true;
+            MF->setPhysRegUsed(*AliasSet);
           }
         }
       }
@@ -693,7 +692,7 @@ void RA::AllocateBasicBlock(MachineBasicBlock &MBB) {
         // If DestVirtReg already has a value, use it.
         if (!(DestPhysReg = getVirt2PhysRegMapSlot(DestVirtReg)))
           DestPhysReg = getReg(MBB, MI, DestVirtReg);
-        PhysRegsEverUsed[DestPhysReg] = true;
+        MF->setPhysRegUsed(DestPhysReg);
         markVirtRegModified(DestVirtReg);
         MI->getOperand(i).setReg(DestPhysReg);  // Assign the output register
       }
@@ -779,10 +778,6 @@ bool RA::runOnMachineFunction(MachineFunction &Fn) {
   RegInfo = TM->getRegisterInfo();
   LV = &getAnalysis<LiveVariables>();
 
-  PhysRegsEverUsed = new bool[RegInfo->getNumRegs()];
-  std::fill(PhysRegsEverUsed, PhysRegsEverUsed+RegInfo->getNumRegs(), false);
-  Fn.setUsedPhysRegs(PhysRegsEverUsed);
-
   PhysRegsUsed.assign(RegInfo->getNumRegs(), -1);
   
   // At various places we want to efficiently check to see whether a register
diff --git a/lib/CodeGen/RegAllocSimple.cpp b/lib/CodeGen/RegAllocSimple.cpp
index e632e3599a..576d2b421c 100644
--- a/lib/CodeGen/RegAllocSimple.cpp
+++ b/lib/CodeGen/RegAllocSimple.cpp
@@ -41,7 +41,6 @@ namespace {
     MachineFunction *MF;
     const TargetMachine *TM;
     const MRegisterInfo *RegInfo;
-    bool *PhysRegsEverUsed;
 
     // StackSlotForVirtReg - Maps SSA Regs => frame index on the stack where
     // these values are spilled
@@ -126,7 +125,7 @@ unsigned RegAllocSimple::getFreeReg(unsigned virtualReg) {
     unsigned PhysReg = *(RI+regIdx);
 
     if (!RegsUsed[PhysReg]) {
-      PhysRegsEverUsed[PhysReg] = true;
+      MF->setPhysRegUsed(PhysReg);
       return PhysReg;
     }
   }
@@ -178,7 +177,7 @@ void RegAllocSimple::AllocateBasicBlock(MachineBasicBlock &MBB) {
     if (Desc.ImplicitDefs) {
       for (Regs = Desc.ImplicitDefs; *Regs; ++Regs) {
         RegsUsed[*Regs] = true;
-        PhysRegsEverUsed[*Regs] = true;
+        MF->setPhysRegUsed(*Regs);
       }
     }
 
@@ -236,10 +235,6 @@ bool RegAllocSimple::runOnMachineFunction(MachineFunction &Fn) {
   TM = &MF->getTarget();
   RegInfo = TM->getRegisterInfo();
 
-  PhysRegsEverUsed = new bool[RegInfo->getNumRegs()];
-  std::fill(PhysRegsEverUsed, PhysRegsEverUsed+RegInfo->getNumRegs(), false);
-  Fn.setUsedPhysRegs(PhysRegsEverUsed);
-
   // Loop over all of the basic blocks, eliminating virtual register references
   for (MachineFunction::iterator MBB = Fn.begin(), MBBe = Fn.end();
        MBB != MBBe; ++MBB)
diff --git a/lib/CodeGen/VirtRegMap.cpp b/lib/CodeGen/VirtRegMap.cpp
index 3fb84bdd8f..482e336f87 100644
--- a/lib/CodeGen/VirtRegMap.cpp
+++ b/lib/CodeGen/VirtRegMap.cpp
@@ -174,7 +174,6 @@ bool SimpleSpiller::runOnMachineFunction(MachineFunction &MF, VirtRegMap &VRM) {
   DOUT << "********** Function: " << MF.getFunction()->getName() << '\n';
   const TargetMachine &TM = MF.getTarget();
   const MRegisterInfo &MRI = *TM.getRegisterInfo();
-  bool *PhysRegsUsed = MF.getUsedPhysregs();
 
   // LoadedRegs - Keep track of which vregs are loaded, so that we only load
   // each vreg once (in the case where a spilled vreg is used by multiple
@@ -214,10 +213,10 @@ bool SimpleSpiller::runOnMachineFunction(MachineFunction &MF, VirtRegMap &VRM) {
                 ++NumStores;
               }
             }
-            PhysRegsUsed[PhysReg] = true;
+            MF.setPhysRegUsed(PhysReg);
             MI.getOperand(i).setReg(PhysReg);
           } else {
-            PhysRegsUsed[MO.getReg()] = true;
+            MF.setPhysRegUsed(MO.getReg());
           }
       }
 
@@ -648,8 +647,7 @@ void LocalSpiller::RewriteMBB(MachineBasicBlock &MBB, VirtRegMap &VRM,
   // same stack slot, the original store is deleted.
   std::map<int, MachineInstr*> MaybeDeadStores;
 
-  bool *PhysRegsUsed = MBB.getParent()->getUsedPhysregs();
-
+  MachineFunction &MF = *MBB.getParent();
   for (MachineBasicBlock::iterator MII = MBB.begin(), E = MBB.end();
        MII != E; ) {
     MachineInstr &MI = *MII;
@@ -688,7 +686,7 @@ void LocalSpiller::RewriteMBB(MachineBasicBlock &MBB, VirtRegMap &VRM,
     const unsigned *ImpDef = TID->ImplicitDefs;
     if (ImpDef) {
       for ( ; *ImpDef; ++ImpDef) {
-        PhysRegsUsed[*ImpDef] = true;
+        MF.setPhysRegUsed(*ImpDef);
         ReusedOperands.markClobbered(*ImpDef);
         Spills.ClobberPhysReg(*ImpDef);
       }
@@ -703,7 +701,7 @@ void LocalSpiller::RewriteMBB(MachineBasicBlock &MBB, VirtRegMap &VRM,
       if (MRegisterInfo::isPhysicalRegister(MO.getReg())) {
         // Ignore physregs for spilling, but remember that it is used by this
         // function.
-        PhysRegsUsed[MO.getReg()] = true;
+        MF.setPhysRegUsed(MO.getReg());
         ReusedOperands.markClobbered(MO.getReg());
         continue;
       }
@@ -715,7 +713,7 @@ void LocalSpiller::RewriteMBB(MachineBasicBlock &MBB, VirtRegMap &VRM,
       if (!VRM.hasStackSlot(VirtReg)) {
         // This virtual register was assigned a physreg!
         unsigned Phys = VRM.getPhys(VirtReg);
-        PhysRegsUsed[Phys] = true;
+        MF.setPhysRegUsed(Phys);
         if (MO.isDef())
           ReusedOperands.markClobbered(Phys);
         MI.getOperand(i).setReg(Phys);
@@ -842,10 +840,8 @@ void LocalSpiller::RewriteMBB(MachineBasicBlock &MBB, VirtRegMap &VRM,
           continue;
         }
         
-        const TargetRegisterClass* RC =
-          MBB.getParent()->getSSARegMap()->getRegClass(VirtReg);
-
-        PhysRegsUsed[DesignatedReg] = true;
+        const TargetRegisterClass* RC = MF.getSSARegMap()->getRegClass(VirtReg);
+        MF.setPhysRegUsed(DesignatedReg);
         ReusedOperands.markClobbered(DesignatedReg);
         MRI->copyRegToReg(MBB, &MI, DesignatedReg, PhysReg, RC);
 
@@ -883,8 +879,7 @@ void LocalSpiller::RewriteMBB(MachineBasicBlock &MBB, VirtRegMap &VRM,
       // Otherwise, reload it and remember that we have it.
       PhysReg = VRM.getPhys(VirtReg);
       assert(PhysReg && "Must map virtreg to physreg!");
-      const TargetRegisterClass* RC =
-        MBB.getParent()->getSSARegMap()->getRegClass(VirtReg);
+      const TargetRegisterClass* RC = MF.getSSARegMap()->getRegClass(VirtReg);
 
       // Note that, if we reused a register for a previous operand, the
       // register we want to reload into might not actually be
@@ -894,7 +889,7 @@ void LocalSpiller::RewriteMBB(MachineBasicBlock &MBB, VirtRegMap &VRM,
         PhysReg = ReusedOperands.GetRegForReload(PhysReg, &MI, 
                                                  Spills, MaybeDeadStores);
       
-      PhysRegsUsed[PhysReg] = true;
+      MF.setPhysRegUsed(PhysReg);
       ReusedOperands.markClobbered(PhysReg);
       if (doReMat) {
         MRI->reMaterialize(MBB, &MI, PhysReg, VRM.getReMaterializedMI(VirtReg));
@@ -947,7 +942,6 @@ void LocalSpiller::RewriteMBB(MachineBasicBlock &MBB, VirtRegMap &VRM,
             MachineInstr *SSMI = NULL;
             if (unsigned InReg = Spills.getSpillSlotPhysReg(SS, SSMI)) {
               DOUT << "Promoted Load To Copy: " << MI;
-              MachineFunction &MF = *MBB.getParent();
               if (DestReg != InReg) {
                 MRI->copyRegToReg(MBB, &MI, DestReg, InReg,
                                   MF.getSSARegMap()->getRegClass(VirtReg));
@@ -1081,8 +1075,7 @@ void LocalSpiller::RewriteMBB(MachineBasicBlock &MBB, VirtRegMap &VRM,
 
         // The only vregs left are stack slot definitions.
         int StackSlot = VRM.getStackSlot(VirtReg);
-        const TargetRegisterClass *RC =
-          MBB.getParent()->getSSARegMap()->getRegClass(VirtReg);
+        const TargetRegisterClass *RC = MF.getSSARegMap()->getRegClass(VirtReg);
 
         // If this def is part of a two-address operand, make sure to execute
         // the store from the correct physical register.
@@ -1100,7 +1093,7 @@ void LocalSpiller::RewriteMBB(MachineBasicBlock &MBB, VirtRegMap &VRM,
           }
         }
 
-        PhysRegsUsed[PhysReg] = true;
+        MF.setPhysRegUsed(PhysReg);
         ReusedOperands.markClobbered(PhysReg);
         MRI->storeRegToStackSlot(MBB, next(MII), PhysReg, StackSlot, RC);
         DOUT << "Store:\t" << *next(MII);