Rename MVT::getVectorBaseType to MVT::getVectorElementType.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37579 91177308-0d34-0410-b5e6-96231b3b80d8

4 files changed, 10 insertions, 10 deletions

diff --git a/lib/CodeGen/SelectionDAG/DAGCombiner.cpp b/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
index 1dac2ca1ef..8cc4036347 100644
--- a/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
+++ b/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
@@ -1809,7 +1809,7 @@ SDOperand DAGCombiner::visitXOR(SDNode *N) {
       return DAG.getConstant(0, VT);
     } else if (!AfterLegalize || TLI.isOperationLegal(ISD::BUILD_VECTOR, VT)) {
       // Produce a vector of zeros.
-      SDOperand El = DAG.getConstant(0, MVT::getVectorBaseType(VT));
+      SDOperand El = DAG.getConstant(0, MVT::getVectorElementType(VT));
       std::vector<SDOperand> Ops(MVT::getVectorNumElements(VT), El);
       return DAG.getNode(ISD::BUILD_VECTOR, VT, &Ops[0], Ops.size());
     }
diff --git a/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp b/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
index aeb6f276c5..7d57c00c14 100644
--- a/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
+++ b/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
@@ -1014,7 +1014,7 @@ SDOperand SelectionDAGLegalize::LegalizeOp(SDOperand Op) {
         
         unsigned NumElts = MVT::getVectorNumElements(Tmp1.getValueType());
         MVT::ValueType ShufMaskVT = MVT::getIntVectorWithNumElements(NumElts);
-        MVT::ValueType ShufMaskEltVT = MVT::getVectorBaseType(ShufMaskVT);
+        MVT::ValueType ShufMaskEltVT = MVT::getVectorElementType(ShufMaskVT);
         
         // We generate a shuffle of InVec and ScVec, so the shuffle mask should
         // be 0,1,2,3,4,5... with the appropriate element replaced with elt 0 of
@@ -1110,7 +1110,7 @@ SDOperand SelectionDAGLegalize::LegalizeOp(SDOperand Op) {
       // FALLTHROUGH
     case TargetLowering::Expand: {
       MVT::ValueType VT = Node->getValueType(0);
-      MVT::ValueType EltVT = MVT::getVectorBaseType(VT);
+      MVT::ValueType EltVT = MVT::getVectorElementType(VT);
       MVT::ValueType PtrVT = TLI.getPointerTy();
       SDOperand Mask = Node->getOperand(2);
       unsigned NumElems = Mask.getNumOperands();
@@ -2386,7 +2386,7 @@ SDOperand SelectionDAGLegalize::LegalizeOp(SDOperand Op) {
              "Cannot expand this binary operator!");
       // Expand the operation into a bunch of nasty scalar code.
       SmallVector<SDOperand, 8> Ops;
-      MVT::ValueType EltVT = MVT::getVectorBaseType(Node->getValueType(0));
+      MVT::ValueType EltVT = MVT::getVectorElementType(Node->getValueType(0));
       MVT::ValueType PtrVT = TLI.getPointerTy();
       for (unsigned i = 0, e = MVT::getVectorNumElements(Node->getValueType(0));
            i != e; ++i) {
@@ -4006,7 +4006,7 @@ SDOperand SelectionDAGLegalize::ExpandBUILD_VECTOR(SDNode *Node) {
     // Build the shuffle constant vector: <0, 0, 0, 0>
     MVT::ValueType MaskVT = 
       MVT::getIntVectorWithNumElements(NumElems);
-    SDOperand Zero = DAG.getConstant(0, MVT::getVectorBaseType(MaskVT));
+    SDOperand Zero = DAG.getConstant(0, MVT::getVectorElementType(MaskVT));
     std::vector<SDOperand> ZeroVec(NumElems, Zero);
     SDOperand SplatMask = DAG.getNode(ISD::BUILD_VECTOR, MaskVT,
                                       &ZeroVec[0], ZeroVec.size());
@@ -4036,7 +4036,7 @@ SDOperand SelectionDAGLegalize::ExpandBUILD_VECTOR(SDNode *Node) {
            E = Values.end(); I != E; ++I) {
       for (std::vector<unsigned>::iterator II = I->second.begin(),
              EE = I->second.end(); II != EE; ++II)
-        MaskVec[*II] = DAG.getConstant(i, MVT::getVectorBaseType(MaskVT));
+        MaskVec[*II] = DAG.getConstant(i, MVT::getVectorElementType(MaskVT));
       i += NumElems;
     }
     SDOperand ShuffleMask = DAG.getNode(ISD::BUILD_VECTOR, MaskVT,
diff --git a/lib/CodeGen/SelectionDAG/SelectionDAG.cpp b/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
index e3ee9fb0d8..5c24b931e1 100644
--- a/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
+++ b/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
@@ -1114,7 +1114,7 @@ SDOperand SelectionDAG::getNode(unsigned Opcode, MVT::ValueType VT,
     break;
   case ISD::SCALAR_TO_VECTOR:
     assert(MVT::isVector(VT) && !MVT::isVector(Operand.getValueType()) &&
-           MVT::getVectorBaseType(VT) == Operand.getValueType() &&
+           MVT::getVectorElementType(VT) == Operand.getValueType() &&
            "Illegal SCALAR_TO_VECTOR node!");
     break;
   case ISD::FNEG:
@@ -1593,7 +1593,7 @@ SDOperand SelectionDAG::getExtLoad(ISD::LoadExtType ExtType, MVT::ValueType VT,
     ExtType = ISD::NON_EXTLOAD;
 
   if (MVT::isVector(VT))
-    assert(EVT == MVT::getVectorBaseType(VT) && "Invalid vector extload!");
+    assert(EVT == MVT::getVectorElementType(VT) && "Invalid vector extload!");
   else
     assert(EVT < VT && "Should only be an extending load, not truncating!");
   assert((ExtType == ISD::EXTLOAD || MVT::isInteger(VT)) &&
diff --git a/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp b/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
index 69d51d81c2..ed833e26ef 100644
--- a/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
+++ b/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
@@ -793,7 +793,7 @@ SDOperand SelectionDAGLowering::getValue(const Value *V) {
     
     if (MVT::isVector(PTyElementVT)) {
       Ops.push_back(DAG.getConstant(NE * MVT::getVectorNumElements(PTyElementVT), MVT::i32));
-      Ops.push_back(DAG.getValueType(MVT::getVectorBaseType(PTyElementVT)));
+      Ops.push_back(DAG.getValueType(MVT::getVectorElementType(PTyElementVT)));
       N = DAG.getNode(ISD::VCONCAT_VECTORS, MVT::Vector, &Ops[0], Ops.size());
     } else {
       Ops.push_back(DAG.getConstant(NE, MVT::i32));
@@ -2905,7 +2905,7 @@ SDOperand RegsForValue::getCopyFromRegs(SelectionDAG &DAG,
     return DAG.getNode(ISD::VBIT_CONVERT, MVT::Vector, Val, 
                        DAG.getConstant(MVT::getVectorNumElements(RegVT),
                                        MVT::i32),
-                       DAG.getValueType(MVT::getVectorBaseType(RegVT)));
+                       DAG.getValueType(MVT::getVectorElementType(RegVT)));
   }
   
   if (MVT::isInteger(RegVT)) {