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authorAlkis Evlogimenos <alkis@evlogimenos.com>2004-02-13 21:01:20 +0000
committerAlkis Evlogimenos <alkis@evlogimenos.com>2004-02-13 21:01:20 +0000
commitbe766c72464116a445a02b542a450c4274bab5d0 (patch)
treedf819681fc4d2a770e0aecceca8d5473a7d66574 /lib/CodeGen/TwoAddressInstructionPass.cpp
parent903b22cd51d82ba1c1c5ee5d37b7eb7911c755ee (diff)
Remove getAllocatedRegNum(). Use getReg() instead.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11393 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/CodeGen/TwoAddressInstructionPass.cpp')
-rw-r--r--lib/CodeGen/TwoAddressInstructionPass.cpp12
1 files changed, 6 insertions, 6 deletions
diff --git a/lib/CodeGen/TwoAddressInstructionPass.cpp b/lib/CodeGen/TwoAddressInstructionPass.cpp
index 3f99f2a479..8dc2ffe365 100644
--- a/lib/CodeGen/TwoAddressInstructionPass.cpp
+++ b/lib/CodeGen/TwoAddressInstructionPass.cpp
@@ -97,14 +97,14 @@ bool TwoAddressInstructionPass::runOnMachineFunction(MachineFunction &MF) {
DEBUG(std::cerr << "\tinstruction: "; mi->print(std::cerr, TM));
assert(mi->getOperand(1).isRegister() &&
- mi->getOperand(1).getAllocatedRegNum() &&
+ mi->getOperand(1).getReg() &&
mi->getOperand(1).isUse() &&
"two address instruction invalid");
// if the two operands are the same we just remove the use
// and mark the def as def&use
- if (mi->getOperand(0).getAllocatedRegNum() ==
- mi->getOperand(1).getAllocatedRegNum()) {
+ if (mi->getOperand(0).getReg() ==
+ mi->getOperand(1).getReg()) {
}
else {
MadeChange = true;
@@ -114,8 +114,8 @@ bool TwoAddressInstructionPass::runOnMachineFunction(MachineFunction &MF) {
// to:
// a = b
// a = a op c
- unsigned regA = mi->getOperand(0).getAllocatedRegNum();
- unsigned regB = mi->getOperand(1).getAllocatedRegNum();
+ unsigned regA = mi->getOperand(0).getReg();
+ unsigned regB = mi->getOperand(1).getReg();
assert(MRegisterInfo::isVirtualRegister(regA) &&
MRegisterInfo::isVirtualRegister(regB) &&
@@ -127,7 +127,7 @@ bool TwoAddressInstructionPass::runOnMachineFunction(MachineFunction &MF) {
// because we are in SSA form.
for (unsigned i = 1; i != mi->getNumOperands(); ++i)
assert(!mi->getOperand(i).isRegister() ||
- mi->getOperand(i).getAllocatedRegNum() != (int)regA);
+ mi->getOperand(i).getReg() != regA);
const TargetRegisterClass* rc =
MF.getSSARegMap()->getRegClass(regA);