diff options
author | Evan Cheng <evan.cheng@apple.com> | 2009-09-21 21:12:25 +0000 |
---|---|---|
committer | Evan Cheng <evan.cheng@apple.com> | 2009-09-21 21:12:25 +0000 |
commit | cf985a95454c935d8662ef5200c79ca0553b3da7 (patch) | |
tree | f4f53dc8ca5f5a48dd109856d3c1dc631228efcb /lib/CodeGen/SimpleRegisterCoalescing.h | |
parent | b2bb7db9e242c54a4a84448ab503015a148e9286 (diff) |
Clean up spill weight computation. Also some changes to give loop induction
variable increment / decrement slighter high priority.
This has major impact on some micro-benchmarks. On MultiSource/Applications
and spec tests, it's a minor win. It also reduce 256.bzip instruction count
by 8%, 55 on 164.gzip on i386 / Darwin.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@82485 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/CodeGen/SimpleRegisterCoalescing.h')
-rw-r--r-- | lib/CodeGen/SimpleRegisterCoalescing.h | 13 |
1 files changed, 7 insertions, 6 deletions
diff --git a/lib/CodeGen/SimpleRegisterCoalescing.h b/lib/CodeGen/SimpleRegisterCoalescing.h index 7364767ab0..20b8eb2274 100644 --- a/lib/CodeGen/SimpleRegisterCoalescing.h +++ b/lib/CodeGen/SimpleRegisterCoalescing.h @@ -123,7 +123,6 @@ namespace llvm { /// classes. The registers may be either phys or virt regs. bool differingRegisterClasses(unsigned RegA, unsigned RegB) const; - /// AdjustCopiesBackFrom - We found a non-trivially-coalescable copy. If /// the source value number is defined by a copy from the destination reg /// see if we can merge these two destination reg valno# into a single @@ -235,13 +234,15 @@ namespace llvm { /// lastRegisterUse - Returns the last use of the specific register between /// cycles Start and End or NULL if there are no uses. - MachineOperand *lastRegisterUse(MachineInstrIndex Start, MachineInstrIndex End, - unsigned Reg, MachineInstrIndex &LastUseIdx) const; + MachineOperand *lastRegisterUse(MachineInstrIndex Start, + MachineInstrIndex End, unsigned Reg, + MachineInstrIndex &LastUseIdx) const; - void printRegName(unsigned reg) const; + /// CalculateSpillWeights - Compute spill weights for all virtual register + /// live intervals. + void CalculateSpillWeights(); - /// Returns true if the given live interval is zero length. - bool isZeroLengthInterval(LiveInterval *li) const; + void printRegName(unsigned reg) const; }; } // End llvm namespace |