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authorPatrik Hagglund <patrik.h.hagglund@ericsson.com>2012-12-11 09:57:18 +0000
committerPatrik Hagglund <patrik.h.hagglund@ericsson.com>2012-12-11 09:57:18 +0000
commitbade0345d190427a08b2b947bc94f4d8ca5d7717 (patch)
tree978829ccb08f3461c1ede97c7490b22c4bdd9c22 /lib/CodeGen/SelectionDAG/TargetLowering.cpp
parentbb2543bb0e38495cd655be3eadcb9dd008ac56d2 (diff)
Change TargetLowering::findRepresentativeClass to take an MVT, instead
of EVT. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169845 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/CodeGen/SelectionDAG/TargetLowering.cpp')
-rw-r--r--lib/CodeGen/SelectionDAG/TargetLowering.cpp4
1 files changed, 2 insertions, 2 deletions
diff --git a/lib/CodeGen/SelectionDAG/TargetLowering.cpp b/lib/CodeGen/SelectionDAG/TargetLowering.cpp
index c866eded56..78f72ab7a5 100644
--- a/lib/CodeGen/SelectionDAG/TargetLowering.cpp
+++ b/lib/CodeGen/SelectionDAG/TargetLowering.cpp
@@ -712,9 +712,9 @@ bool TargetLowering::isLegalRC(const TargetRegisterClass *RC) const {
/// findRepresentativeClass - Return the largest legal super-reg register class
/// of the register class for the specified type and its associated "cost".
std::pair<const TargetRegisterClass*, uint8_t>
-TargetLowering::findRepresentativeClass(EVT VT) const {
+TargetLowering::findRepresentativeClass(MVT VT) const {
const TargetRegisterInfo *TRI = getTargetMachine().getRegisterInfo();
- const TargetRegisterClass *RC = RegClassForVT[VT.getSimpleVT().SimpleTy];
+ const TargetRegisterClass *RC = RegClassForVT[VT.SimpleTy];
if (!RC)
return std::make_pair(RC, 0);