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| author | Evan Cheng <evan.cheng@apple.com> | 2012-07-17 07:47:50 +0000 |
|---|---|---|
| committer | Evan Cheng <evan.cheng@apple.com> | 2012-07-17 07:47:50 +0000 |
| commit | b4d4959fdda7afdf7994d3cb0b20c052ad0c7895 (patch) | |
| tree | 08e05c89486e35fd5760856a6d033d847dfe685f /lib/CodeGen/SelectionDAG/TargetLowering.cpp | |
| parent | 70e10d3fe4c5df189348f64fce56254a5a32b51c (diff) | |
Make sure constant bitwidth is <= 64 bit before calling getSExtValue().
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160350 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/CodeGen/SelectionDAG/TargetLowering.cpp')
| -rw-r--r-- | lib/CodeGen/SelectionDAG/TargetLowering.cpp | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/lib/CodeGen/SelectionDAG/TargetLowering.cpp b/lib/CodeGen/SelectionDAG/TargetLowering.cpp index 9902ed76fa..d439a6f869 100644 --- a/lib/CodeGen/SelectionDAG/TargetLowering.cpp +++ b/lib/CodeGen/SelectionDAG/TargetLowering.cpp @@ -2323,7 +2323,8 @@ TargetLowering::SimplifySetCC(EVT VT, SDValue N0, SDValue N1, } } - if (!isLegalICmpImmediate(C1.getSExtValue())) { + if (C1.getMinSignedBits() <= 64 && + !isLegalICmpImmediate(C1.getSExtValue())) { // (X & -256) == 256 -> (X >> 8) == 1 if ((Cond == ISD::SETEQ || Cond == ISD::SETNE) && N0.getOpcode() == ISD::AND && N0.hasOneUse()) { |