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| author | Dale Johannesen <dalej@apple.com> | 2007-07-13 17:13:54 +0000 |
|---|---|---|
| committer | Dale Johannesen <dalej@apple.com> | 2007-07-13 17:13:54 +0000 |
| commit | e7e7d0d7e39d0c7c659d26b97e8081fce0fcd749 (patch) | |
| tree | dd6cd725eabab3df16cbb5fa329aa30ffefb8e9d /lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp | |
| parent | 8dc4b59b857fdffe79dca0a3a8516ddf942d5466 (diff) | |
Skeleton of post-RA scheduler; doesn't do anything yet.
Change name of -sched option and DEBUG_TYPE to
pre-RA-sched; adjust testcases.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@39816 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp')
| -rw-r--r-- | lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp b/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp index 373bce559d..87bf249764 100644 --- a/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp +++ b/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp @@ -73,9 +73,9 @@ MachinePassRegistry RegisterScheduler::Registry; namespace { cl::opt<RegisterScheduler::FunctionPassCtor, false, RegisterPassParser<RegisterScheduler> > - ISHeuristic("sched", + ISHeuristic("pre-RA-sched", cl::init(&createDefaultScheduler), - cl::desc("Instruction schedulers available:")); + cl::desc("Instruction schedulers available (before register allocation):")); static RegisterScheduler defaultListDAGScheduler("default", " Best scheduler for the target", |