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| author | Nicolas Geoffray <nicolas.geoffray@lip6.fr> | 2008-04-14 17:17:14 +0000 |
|---|---|---|
| committer | Nicolas Geoffray <nicolas.geoffray@lip6.fr> | 2008-04-14 17:17:14 +0000 |
| commit | 9701c8a18fd3888d20f4cd8fcebc6bc99f005c0a (patch) | |
| tree | 2d224620b9224f82cd4491b9ed0982bfd5e972d6 /lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp | |
| parent | 6c4be9c23bbe2512a264d2d4f890d6655b96139b (diff) | |
Fix /test/CodeGen/PowerPC/big-endian-actual-args.ll for linux/ppc32
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@49652 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp')
| -rw-r--r-- | lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp b/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp index 04aa472d8f..f37280895c 100644 --- a/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp +++ b/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp @@ -4162,13 +4162,13 @@ TargetLowering::LowerArguments(Function &F, SelectionDAG &DAG) { unsigned NumRegs = getNumRegisters(VT); for (unsigned i = 0; i != NumRegs; ++i) { RetVals.push_back(RegisterVT); - + ISD::ArgFlagsTy MyFlags = Flags; if (NumRegs > 1 && i == 0) - Flags.setDivided(); + MyFlags.setDivided(); // if it isn't first piece, alignment must be 1 else if (i > 0) - Flags.setOrigAlign(1); - Ops.push_back(DAG.getArgFlags(Flags)); + MyFlags.setOrigAlign(1); + Ops.push_back(DAG.getArgFlags(MyFlags)); } } |