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| author | Bill Wendling <isanbard@gmail.com> | 2008-08-22 20:51:05 +0000 |
|---|---|---|
| committer | Bill Wendling <isanbard@gmail.com> | 2008-08-22 20:51:05 +0000 |
| commit | 449416deb6d08bbc0939c51e5e82f55decdff601 (patch) | |
| tree | a80ccea057402e75cf99deac3f9ed5c6029653e1 /lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp | |
| parent | 5ed3cbb753ac3cd1967d6e2d37b6985655607559 (diff) | |
Reverting r55190, r55191, and r55192. They broke the build with this error message:
{standard input}:17:bad register name `%sil'
make[4]: *** [libgcc/./_addvsi3.o] Error 1
make[4]: *** Waiting for unfinished jobs....
{standard input}:23:bad register name `%dil'
{standard input}:28:bad register name `%dil'
make[4]: *** [libgcc/./_addvdi3.o] Error 1
{standard input}:18:bad register name `%sil'
make[4]: *** [libgcc/./_subvsi3.o] Error 1
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55200 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp')
| -rw-r--r-- | lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp b/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp index e13cfc0fa0..9304c0e7a1 100644 --- a/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp +++ b/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp @@ -5113,7 +5113,7 @@ void SelectionDAGISel::BuildSelectionDAG(SelectionDAG &DAG, BasicBlock *LLVMBB, cast<BranchInst>(LLVMBB->getTerminator())->isUnconditional()) { if (FastISel *F = TLI.createFastISel(FuncInfo.MF)) { Begin = F->SelectInstructions(Begin, LLVMBB->end(), - FuncInfo.ValueMap, FuncInfo.MBBMap, BB); + FuncInfo.ValueMap, BB); // Clean up the FastISel object. TODO: Reorganize what data is // stored in the FastISel class itself and what is merely passed |