aboutsummaryrefslogtreecommitdiff
path: root/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.h
diff options
context:
space:
mode:
authorDan Gohman <gohman@apple.com>2010-04-19 22:41:47 +0000
committerDan Gohman <gohman@apple.com>2010-04-19 22:41:47 +0000
commit99be8ae3898d87373ef0c8f1159b287e28a8d81b (patch)
tree628f5f4677359b4c56716a57d0d92ecb7ce4fbf0 /lib/CodeGen/SelectionDAG/SelectionDAGBuilder.h
parentc056454ecfe66f7c646fedef594f4ed48a9f3bf0 (diff)
Eliminate the CurMBB member from SelectionDAGBuilder. For places that
need it, just pass around the parent block of the current instruction explicitly. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101822 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/CodeGen/SelectionDAG/SelectionDAGBuilder.h')
-rw-r--r--lib/CodeGen/SelectionDAG/SelectionDAGBuilder.h32
1 files changed, 18 insertions, 14 deletions
diff --git a/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.h b/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.h
index a899f01d93..883b9b1b18 100644
--- a/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.h
+++ b/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.h
@@ -82,8 +82,6 @@ class ZExtInst;
/// implementation that is parameterized by a TargetLowering object.
///
class SelectionDAGBuilder {
- MachineBasicBlock *CurMBB;
-
/// CurDebugLoc - current file + line number. Changes as we build the DAG.
DebugLoc CurDebugLoc;
@@ -350,8 +348,6 @@ public:
void visit(unsigned Opcode, const User &I);
- void setCurrentBasicBlock(MachineBasicBlock *MBB) { CurMBB = MBB; }
-
SDValue getValue(const Value *V);
void setValue(const Value *V, SDValue NewN) {
@@ -366,10 +362,11 @@ public:
void FindMergedConditions(const Value *Cond, MachineBasicBlock *TBB,
MachineBasicBlock *FBB, MachineBasicBlock *CurBB,
- unsigned Opc);
+ MachineBasicBlock *SwitchBB, unsigned Opc);
void EmitBranchForMergedCondition(const Value *Cond, MachineBasicBlock *TBB,
MachineBasicBlock *FBB,
- MachineBasicBlock *CurBB);
+ MachineBasicBlock *CurBB,
+ MachineBasicBlock *SwitchBB);
bool ShouldEmitAsBranches(const std::vector<CaseBlock> &Cases);
bool isExportableFromCurrentBlock(const Value *V, const BasicBlock *FromBB);
void CopyToExportRegsIfNeeded(const Value *V);
@@ -389,27 +386,34 @@ private:
bool handleSmallSwitchRange(CaseRec& CR,
CaseRecVector& WorkList,
const Value* SV,
- MachineBasicBlock* Default);
+ MachineBasicBlock* Default,
+ MachineBasicBlock *SwitchBB);
bool handleJTSwitchCase(CaseRec& CR,
CaseRecVector& WorkList,
const Value* SV,
- MachineBasicBlock* Default);
+ MachineBasicBlock* Default,
+ MachineBasicBlock *SwitchBB);
bool handleBTSplitSwitchCase(CaseRec& CR,
CaseRecVector& WorkList,
const Value* SV,
- MachineBasicBlock* Default);
+ MachineBasicBlock* Default,
+ MachineBasicBlock *SwitchBB);
bool handleBitTestsSwitchCase(CaseRec& CR,
CaseRecVector& WorkList,
const Value* SV,
- MachineBasicBlock* Default);
+ MachineBasicBlock* Default,
+ MachineBasicBlock *SwitchBB);
public:
- void visitSwitchCase(CaseBlock &CB);
- void visitBitTestHeader(BitTestBlock &B);
+ void visitSwitchCase(CaseBlock &CB,
+ MachineBasicBlock *SwitchBB);
+ void visitBitTestHeader(BitTestBlock &B, MachineBasicBlock *SwitchBB);
void visitBitTestCase(MachineBasicBlock* NextMBB,
unsigned Reg,
- BitTestCase &B);
+ BitTestCase &B,
+ MachineBasicBlock *SwitchBB);
void visitJumpTable(JumpTable &JT);
- void visitJumpTableHeader(JumpTable &JT, JumpTableHeader &JTH);
+ void visitJumpTableHeader(JumpTable &JT, JumpTableHeader &JTH,
+ MachineBasicBlock *SwitchBB);
private:
// These all get lowered before this pass.