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authorAnton Korobeynikov <asl@math.spbu.ru>2010-03-14 18:42:15 +0000
committerAnton Korobeynikov <asl@math.spbu.ru>2010-03-14 18:42:15 +0000
commitbe5b032e4b06ae001098856c2dc4ebca41528132 (patch)
treed00d7df9b4fb5f7c0b89f11b1f4ba92da31bef51 /lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
parentfeacf28cf803373b48a9af7995218728957f5403 (diff)
Add DAG nodes to represent FP16 <-> FP32 intrinsics
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98500 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp')
-rw-r--r--lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp8
1 files changed, 8 insertions, 0 deletions
diff --git a/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp b/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
index fc14e9047e..a034b4cc51 100644
--- a/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
+++ b/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
@@ -4000,6 +4000,14 @@ SelectionDAGBuilder::visitIntrinsicCall(CallInst &I, unsigned Intrinsic) {
case Intrinsic::pow:
visitPow(I);
return 0;
+ case Intrinsic::convert_to_fp16:
+ setValue(&I, DAG.getNode(ISD::FP32_TO_FP16, dl,
+ MVT::i16, getValue(I.getOperand(1))));
+ return 0;
+ case Intrinsic::convert_from_fp16:
+ setValue(&I, DAG.getNode(ISD::FP16_TO_FP32, dl,
+ MVT::f32, getValue(I.getOperand(1))));
+ return 0;
case Intrinsic::pcmarker: {
SDValue Tmp = getValue(I.getOperand(1));
DAG.setRoot(DAG.getNode(ISD::PCMARKER, dl, MVT::Other, getRoot(), Tmp));