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authorElena Demikhovsky <elena.demikhovsky@intel.com>2013-01-17 09:59:53 +0000
committerElena Demikhovsky <elena.demikhovsky@intel.com>2013-01-17 09:59:53 +0000
commit6c327f92a562d9d280bdbc3bde3c0ce269a4c65c (patch)
tree375086cd503bfd9faeb2a60210fa8a1ded341204 /lib/CodeGen/SelectionDAG/SelectionDAG.cpp
parentc2cbcc3acfc0e7426626331d57b35f1d6c7a4a47 (diff)
Optimization for the following SIGN_EXTEND pairs:
v8i8 -> v8i64, v8i8 -> v8i32, v4i8 -> v4i64, v4i16 -> v4i64 for AVX and AVX2. Bug 14865. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@172708 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/CodeGen/SelectionDAG/SelectionDAG.cpp')
-rw-r--r--lib/CodeGen/SelectionDAG/SelectionDAG.cpp4
1 files changed, 1 insertions, 3 deletions
diff --git a/lib/CodeGen/SelectionDAG/SelectionDAG.cpp b/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
index 344d1447a8..91491bfe80 100644
--- a/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
+++ b/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
@@ -2554,9 +2554,7 @@ SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL,
VT.getVectorNumElements() ==
Operand.getValueType().getVectorNumElements()) &&
"Vector element count mismatch!");
- if (OpOpcode == ISD::SIGN_EXTEND || OpOpcode == ISD::ZERO_EXTEND)
- return getNode(OpOpcode, DL, VT, Operand.getNode()->getOperand(0));
- else if (OpOpcode == ISD::UNDEF)
+ if (OpOpcode == ISD::UNDEF)
// sext(undef) = 0, because the top bits will all be the same.
return getConstant(0, VT);
break;