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| author | Chris Lattner <sabre@nondot.org> | 2007-12-22 21:26:52 +0000 | 
|---|---|---|
| committer | Chris Lattner <sabre@nondot.org> | 2007-12-22 21:26:52 +0000 | 
| commit | d268a497f916b65efaf9ae7392f81d12d4f95e00 (patch) | |
| tree | 4a3acb1cc8747b3699c9f2b07eaec634252218a3 /lib/CodeGen/SelectionDAG/SelectionDAG.cpp | |
| parent | b16f55f3c82fe72e2ca73f1071db5daaa2124e51 (diff) | |
improve support for fgetsign
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45322 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/CodeGen/SelectionDAG/SelectionDAG.cpp')
| -rw-r--r-- | lib/CodeGen/SelectionDAG/SelectionDAG.cpp | 6 | 
1 files changed, 6 insertions, 0 deletions
diff --git a/lib/CodeGen/SelectionDAG/SelectionDAG.cpp b/lib/CodeGen/SelectionDAG/SelectionDAG.cpp index cbeda67727..ba0a08bd8c 100644 --- a/lib/CodeGen/SelectionDAG/SelectionDAG.cpp +++ b/lib/CodeGen/SelectionDAG/SelectionDAG.cpp @@ -1323,6 +1323,11 @@ void SelectionDAG::ComputeMaskedBits(SDOperand Op, uint64_t Mask,      KnownZero |= (~InMask) & Mask;      return;    } +  case ISD::FGETSIGN: +    // All bits are zero except the low bit. +    KnownZero = MVT::getIntVTBitMask(Op.getValueType()) ^ 1; +    return; +      case ISD::ADD: {      // If either the LHS or the RHS are Zero, the result is zero.      ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1); @@ -3703,6 +3708,7 @@ std::string SDNode::getOperationName(const SelectionDAG *G) const {    case ISD::FDIV:   return "fdiv";    case ISD::FREM:   return "frem";    case ISD::FCOPYSIGN: return "fcopysign"; +  case ISD::FGETSIGN:  return "fgetsign";    case ISD::SETCC:       return "setcc";    case ISD::SELECT:      return "select";  | 
