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authorDan Gohman <gohman@apple.com>2008-09-05 01:07:48 +0000
committerDan Gohman <gohman@apple.com>2008-09-05 01:07:48 +0000
commitc7f4a8a80cb7e8cf09495f4b60ae45734e7d5d98 (patch)
tree83742c1480ef1800ca10194695e19cc962ed229a /lib/CodeGen/SelectionDAG/ScheduleDAGEmit.cpp
parentd89ae99ec81f4806fe02b54c7dbe706a1f49ddab (diff)
In FastISel mode, the scheduler may be invoked multiple times
in the same block. Fix the entry-block handling to only run at at the beginning of the entry block, and not any other times. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55817 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/CodeGen/SelectionDAG/ScheduleDAGEmit.cpp')
-rw-r--r--lib/CodeGen/SelectionDAG/ScheduleDAGEmit.cpp4
1 files changed, 3 insertions, 1 deletions
diff --git a/lib/CodeGen/SelectionDAG/ScheduleDAGEmit.cpp b/lib/CodeGen/SelectionDAG/ScheduleDAGEmit.cpp
index 21c12d3993..fff444087a 100644
--- a/lib/CodeGen/SelectionDAG/ScheduleDAGEmit.cpp
+++ b/lib/CodeGen/SelectionDAG/ScheduleDAGEmit.cpp
@@ -731,7 +731,9 @@ void ScheduleDAG::EmitLiveInCopies(MachineBasicBlock *MBB) {
/// EmitSchedule - Emit the machine code in scheduled order.
MachineBasicBlock *ScheduleDAG::EmitSchedule() {
- bool isEntryBB = &MF->front() == BB;
+ // If we're emitting the first code into the entry block, we
+ // have additional work to do.
+ bool isEntryBB = &MF->front() == BB && BB->empty();
if (isEntryBB && !SchedLiveInCopies) {
// If this is the first basic block in the function, and if it has live ins