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| author | Dan Gohman <gohman@apple.com> | 2008-09-05 18:13:01 +0000 |
|---|---|---|
| committer | Dan Gohman <gohman@apple.com> | 2008-09-05 18:13:01 +0000 |
| commit | be0034e3c2f671f255249d51ec95d746709fe1f1 (patch) | |
| tree | c48cf68ace7e2808ad46857491fdc9726be08474 /lib/CodeGen/SelectionDAG/ScheduleDAGEmit.cpp | |
| parent | e2471a9169b23cf13a7e81a6ba35fa2675d320ad (diff) | |
Revert r55817. It broke PIC. FastISel will need to find a different
approach here.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55842 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/CodeGen/SelectionDAG/ScheduleDAGEmit.cpp')
| -rw-r--r-- | lib/CodeGen/SelectionDAG/ScheduleDAGEmit.cpp | 4 |
1 files changed, 1 insertions, 3 deletions
diff --git a/lib/CodeGen/SelectionDAG/ScheduleDAGEmit.cpp b/lib/CodeGen/SelectionDAG/ScheduleDAGEmit.cpp index fff444087a..21c12d3993 100644 --- a/lib/CodeGen/SelectionDAG/ScheduleDAGEmit.cpp +++ b/lib/CodeGen/SelectionDAG/ScheduleDAGEmit.cpp @@ -731,9 +731,7 @@ void ScheduleDAG::EmitLiveInCopies(MachineBasicBlock *MBB) { /// EmitSchedule - Emit the machine code in scheduled order. MachineBasicBlock *ScheduleDAG::EmitSchedule() { - // If we're emitting the first code into the entry block, we - // have additional work to do. - bool isEntryBB = &MF->front() == BB && BB->empty(); + bool isEntryBB = &MF->front() == BB; if (isEntryBB && !SchedLiveInCopies) { // If this is the first basic block in the function, and if it has live ins |