aboutsummaryrefslogtreecommitdiff
path: root/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp
diff options
context:
space:
mode:
authorChris Lattner <sabre@nondot.org>2005-08-30 01:57:23 +0000
committerChris Lattner <sabre@nondot.org>2005-08-30 01:57:23 +0000
commit55334fc45c27c55de61d895e4ec704f0727ebb46 (patch)
tree419901f5ef06d711ccea256008ae101e0e75c557 /lib/CodeGen/SelectionDAG/ScheduleDAG.cpp
parent31ce12f4f57db4375392e9129772773bed1bd4cc (diff)
Handle CopyToReg nodes with flag operands correctly
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23144 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/CodeGen/SelectionDAG/ScheduleDAG.cpp')
-rw-r--r--lib/CodeGen/SelectionDAG/ScheduleDAG.cpp7
1 files changed, 6 insertions, 1 deletions
diff --git a/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp b/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp
index af751edcbf..8fac71c372 100644
--- a/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp
+++ b/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp
@@ -205,8 +205,13 @@ unsigned SimpleSched::Emit(SDOperand Op) {
Emit(Op.getOperand(i));
break;
case ISD::CopyToReg: {
- Emit(Op.getOperand(0)); // Emit the chain.
+ SDOperand ChainOp;
+ if (Op.getNumOperands() == 4)
+ ChainOp = Op.getOperand(3);
+ if (Op.getOperand(0).Val != ChainOp.Val)
+ Emit(Op.getOperand(0)); // Emit the chain.
unsigned Val = Emit(Op.getOperand(2));
+ if (ChainOp.Val) Emit(ChainOp);
MRI.copyRegToReg(*BB, BB->end(),
cast<RegisterSDNode>(Op.getOperand(1))->getReg(), Val,
RegMap->getRegClass(Val));