diff options
author | Dan Gohman <gohman@apple.com> | 2008-11-13 21:36:12 +0000 |
---|---|---|
committer | Dan Gohman <gohman@apple.com> | 2008-11-13 21:36:12 +0000 |
commit | 550f5afb68ce8f034991863cac65bef22a6554da (patch) | |
tree | 07f9840612449da0707b1f75e0e66254ff5d4ceb /lib/CodeGen/SelectionDAG/ScheduleDAG.cpp | |
parent | a23b3b803e3c65e84d6cadaa221de8b256cbe28d (diff) |
Make the Node member of SUnit private, and add accessors.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59264 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/CodeGen/SelectionDAG/ScheduleDAG.cpp')
-rw-r--r-- | lib/CodeGen/SelectionDAG/ScheduleDAG.cpp | 10 |
1 files changed, 5 insertions, 5 deletions
diff --git a/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp b/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp index 8ef493b06e..7dd8f501aa 100644 --- a/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp +++ b/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp @@ -58,7 +58,7 @@ static void CheckForPhysRegDependency(SDNode *Def, SDNode *User, unsigned Op, } SUnit *ScheduleDAG::Clone(SUnit *Old) { - SUnit *SU = NewSUnit(Old->Node); + SUnit *SU = NewSUnit(Old->getNode()); SU->OrigNode = Old->OrigNode; SU->FlaggedNodes = Old->FlaggedNodes; SU->Latency = Old->Latency; @@ -137,7 +137,7 @@ void ScheduleDAG::BuildSchedUnits() { // Now all flagged nodes are in FlaggedNodes and N is the bottom-most node. // Update the SUnit - NodeSUnit->Node = N; + NodeSUnit->setNode(N); assert(N->getNodeId() == -1 && "Node already inserted!"); N->setNodeId(NodeSUnit->NodeNum); @@ -147,7 +147,7 @@ void ScheduleDAG::BuildSchedUnits() { // Pass 2: add the preds, succs, etc. for (unsigned su = 0, e = SUnits.size(); su != e; ++su) { SUnit *SU = &SUnits[su]; - SDNode *MainNode = SU->Node; + SDNode *MainNode = SU->getNode(); if (MainNode->isMachineOpcode()) { unsigned Opc = MainNode->getMachineOpcode(); @@ -209,8 +209,8 @@ void ScheduleDAG::ComputeLatency(SUnit *SU) { } SU->Latency = 0; - if (SU->Node->isMachineOpcode()) { - unsigned SchedClass = TII->get(SU->Node->getMachineOpcode()).getSchedClass(); + if (SU->getNode()->isMachineOpcode()) { + unsigned SchedClass = TII->get(SU->getNode()->getMachineOpcode()).getSchedClass(); const InstrStage *S = InstrItins.begin(SchedClass); const InstrStage *E = InstrItins.end(SchedClass); for (; S != E; ++S) |