fold (conv (load x)) -> (load (conv*)x).

This allows us to compile this:
void foo(double);
void bar(double *X) { foo(*X); }

To this:

bar:
        save -96, %o6, %o6
        ld [%i0+4], %o1
        ld [%i0], %o0
        call foo
        nop
        restore %g0, %g0, %g0
        retl
        nop

instead of this:

bar:
        save -104, %o6, %o6
        ldd [%i0], %f0
        std %f0, [%i6+-8]
        ld [%i6+-4], %o1
        ld [%i6+-8], %o0
        call foo
        nop
        restore %g0, %g0, %g0
        retl
        nop

on SparcV8.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24982 91177308-0d34-0410-b5e6-96231b3b80d8

1 files changed, 10 insertions, 0 deletions

diff --git a/lib/CodeGen/SelectionDAG/DAGCombiner.cpp b/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
index e4f5125e79..f08fd10413 100644
--- a/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
+++ b/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
@@ -1760,6 +1760,16 @@ SDOperand DAGCombiner::visitBIT_CONVERT(SDNode *N) {
   if (N0.getOpcode() == ISD::BIT_CONVERT)  // conv(conv(x,t1),t2) -> conv(x,t2)
     return DAG.getNode(ISD::BIT_CONVERT, VT, N0.getOperand(0));
   
+  // fold (conv (load x)) -> (load (conv*)x)
+  if (N0.getOpcode() == ISD::LOAD && N0.hasOneUse()) {
+    SDOperand Load = DAG.getLoad(VT, N0.getOperand(0), N0.getOperand(1),
+                                 N0.getOperand(2));
+    WorkList.push_back(N);
+    CombineTo(N0.Val, DAG.getNode(ISD::BIT_CONVERT, N0.getValueType(), Load),
+              Load.getValue(1));
+    return Load;
+  }
+  
   return SDOperand();
 }