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| author | Evan Cheng <evan.cheng@apple.com> | 2006-03-01 01:09:54 +0000 |
|---|---|---|
| committer | Evan Cheng <evan.cheng@apple.com> | 2006-03-01 01:09:54 +0000 |
| commit | 860771d2d86243b65ec16fac6cc57b285078f138 (patch) | |
| tree | e1bfb4c322895e61057bf0ddb6b7a7e24775161c /lib/CodeGen/SelectionDAG/DAGCombiner.cpp | |
| parent | f338dd881fe6133d6835325a7feb88cf4a1a9414 (diff) | |
Vector ops lowering.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26436 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/CodeGen/SelectionDAG/DAGCombiner.cpp')
| -rw-r--r-- | lib/CodeGen/SelectionDAG/DAGCombiner.cpp | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/lib/CodeGen/SelectionDAG/DAGCombiner.cpp b/lib/CodeGen/SelectionDAG/DAGCombiner.cpp index 15baeab626..5607e719d5 100644 --- a/lib/CodeGen/SelectionDAG/DAGCombiner.cpp +++ b/lib/CodeGen/SelectionDAG/DAGCombiner.cpp @@ -663,7 +663,7 @@ SDOperand DAGCombiner::visitADD(SDNode *N) { if (N1.getOpcode() == ISD::SUB && N0 == N1.getOperand(1)) return N1.getOperand(0); // - if (SimplifyDemandedBits(SDOperand(N, 0))) + if (!MVT::isVector(VT) && SimplifyDemandedBits(SDOperand(N, 0))) return SDOperand(); return SDOperand(); } |