diff options
| author | Vikram S. Adve <vadve@cs.uiuc.edu> | 2001-11-12 23:26:35 +0000 |
|---|---|---|
| committer | Vikram S. Adve <vadve@cs.uiuc.edu> | 2001-11-12 23:26:35 +0000 |
| commit | 00521d79bf4ee009f59e726a5eb227e04075f5c8 (patch) | |
| tree | c0067df4fa3325297553e3dd0d1845327d76e326 /lib/CodeGen/RegAlloc/PhyRegAlloc.cpp | |
| parent | e492c9d4d1a161cd0972bfb8bab33f073fb018b4 (diff) | |
When allocating space on stack for writing a register,
use the size of the register, not the size of the Value type,
to get the right alignment.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@1284 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/CodeGen/RegAlloc/PhyRegAlloc.cpp')
| -rw-r--r-- | lib/CodeGen/RegAlloc/PhyRegAlloc.cpp | 4 |
1 files changed, 3 insertions, 1 deletions
diff --git a/lib/CodeGen/RegAlloc/PhyRegAlloc.cpp b/lib/CodeGen/RegAlloc/PhyRegAlloc.cpp index bc82565734..9133da5df4 100644 --- a/lib/CodeGen/RegAlloc/PhyRegAlloc.cpp +++ b/lib/CodeGen/RegAlloc/PhyRegAlloc.cpp @@ -528,8 +528,10 @@ void PhyRegAlloc::insertCode4SpilledLR(const LiveRange *LR, int SpillOff = LR->getSpillOffFromFP(); RegClass *RC = LR->getRegClass(); const LiveVarSet *LVSetBef = LVI->getLiveVarSetBeforeMInst(MInst, BB); + + /**** NOTE: THIS SHOULD USE THE RIGHT SIZE FOR THE REG BEING PUSHED ****/ int TmpOff = - mcInfo.pushTempValue(TM, TM.findOptimalStorageSize(LR->getType())); + mcInfo.pushTempValue(TM, 8 /* TM.findOptimalStorageSize(LR->getType()) */); MachineInstr *MIBef=NULL, *AdIMid=NULL, *MIAft=NULL; int TmpReg; |