diff options
author | Dan Gohman <gohman@apple.com> | 2010-06-18 23:28:01 +0000 |
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committer | Dan Gohman <gohman@apple.com> | 2010-06-18 23:28:01 +0000 |
commit | db4971259ce94cea26e555e9ade82672a3581f5c (patch) | |
tree | 312318482d5af5306e9d2881f4bdc15f3b4664b2 /lib/CodeGen/MachineInstr.cpp | |
parent | 8af5ed9e15cfb48817c0f1f46b66b8fe54412036 (diff) |
Teach regular and fast isel to set dead flags on unused implicit defs
on calls and similar instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106353 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/CodeGen/MachineInstr.cpp')
-rw-r--r-- | lib/CodeGen/MachineInstr.cpp | 19 |
1 files changed, 19 insertions, 0 deletions
diff --git a/lib/CodeGen/MachineInstr.cpp b/lib/CodeGen/MachineInstr.cpp index 7e60c3215d..9e7d392234 100644 --- a/lib/CodeGen/MachineInstr.cpp +++ b/lib/CodeGen/MachineInstr.cpp @@ -1461,6 +1461,25 @@ void MachineInstr::addRegisterDefined(unsigned IncomingReg, true /*IsImp*/)); } +void MachineInstr::setPhysRegsDeadExcept(const SmallVectorImpl<unsigned> &UsedRegs, + const TargetRegisterInfo &TRI) { + for (unsigned i = 0, e = getNumOperands(); i != e; ++i) { + MachineOperand &MO = getOperand(i); + if (!MO.isReg() || !MO.isDef()) continue; + unsigned Reg = MO.getReg(); + if (Reg == 0) continue; + bool Dead = true; + for (SmallVectorImpl<unsigned>::const_iterator I = UsedRegs.begin(), + E = UsedRegs.end(); I != E; ++I) + if (TRI.regsOverlap(*I, Reg)) { + Dead = false; + break; + } + // If there are no uses, including partial uses, the def is dead. + if (Dead) MO.setIsDead(); + } +} + unsigned MachineInstrExpressionTrait::getHashValue(const MachineInstr* const &MI) { unsigned Hash = MI->getOpcode() * 37; |