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authorChris Lattner <sabre@nondot.org>2004-02-19 16:17:08 +0000
committerChris Lattner <sabre@nondot.org>2004-02-19 16:17:08 +0000
commit8517e1f0beea9b5e47974f083396d53294c390ad (patch)
treeaaf60b4ae269f1959155e68c6705550c3d118530 /lib/CodeGen/MachineInstr.cpp
parent5e61fa95196b85281eec655787e9c73267532bd1 (diff)
Fix a __LONG__ term annoyance of mine: symbolic registers weren't being printed
by operator<< on MachineInstr's, and looking up what register "24" is all of the time was greatly annoying. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11623 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/CodeGen/MachineInstr.cpp')
-rw-r--r--lib/CodeGen/MachineInstr.cpp22
1 files changed, 16 insertions, 6 deletions
diff --git a/lib/CodeGen/MachineInstr.cpp b/lib/CodeGen/MachineInstr.cpp
index bb7cefe686..3aabbc47f5 100644
--- a/lib/CodeGen/MachineInstr.cpp
+++ b/lib/CodeGen/MachineInstr.cpp
@@ -15,7 +15,7 @@
//===----------------------------------------------------------------------===//
#include "llvm/CodeGen/MachineInstr.h"
-#include "llvm/CodeGen/MachineBasicBlock.h"
+#include "llvm/CodeGen/MachineFunction.h"
#include "llvm/Value.h"
#include "llvm/Target/TargetMachine.h"
#include "llvm/Target/TargetInstrInfo.h"
@@ -198,13 +198,13 @@ static inline std::ostream& OutputValue(std::ostream &os, const Value* val) {
static inline void OutputReg(std::ostream &os, unsigned RegNo,
const MRegisterInfo *MRI = 0) {
- if (MRI) {
- if (MRegisterInfo::isPhysicalRegister(RegNo))
+ if (MRegisterInfo::isPhysicalRegister(RegNo)) {
+ if (MRI)
os << "%" << MRI->get(RegNo).Name;
else
- os << "%reg" << RegNo;
+ os << "%mreg(" << RegNo << ")";
} else
- os << "%mreg(" << RegNo << ")";
+ os << "%reg" << RegNo;
}
static void print(const MachineOperand &MO, std::ostream &OS,
@@ -328,7 +328,17 @@ void MachineInstr::print(std::ostream &OS, const TargetMachine &TM) const {
OS << "\n";
}
-std::ostream &operator<<(std::ostream& os, const MachineInstr& MI) {
+std::ostream &operator<<(std::ostream &os, const MachineInstr &MI) {
+ // If the instruction is embedded into a basic block, we can find the target
+ // info for the instruction.
+ if (const MachineBasicBlock *MBB = MI.getParent()) {
+ const MachineFunction *MF = MBB->getParent();
+ MI.print(os, MF->getTarget());
+ return os;
+ }
+
+ // Otherwise, print it out in the "raw" format without symbolic register names
+ // and such.
os << TargetInstrDescriptors[MI.getOpcode()].Name;
for (unsigned i=0, N=MI.getNumOperands(); i < N; i++) {