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| author | Craig Topper <craig.topper@gmail.com> | 2013-03-14 07:09:57 +0000 |
|---|---|---|
| committer | Craig Topper <craig.topper@gmail.com> | 2013-03-14 07:09:57 +0000 |
| commit | 599521f1671d720a2c786058810537287920f44a (patch) | |
| tree | 29c5c4bb78de3e832137e37a0bb637ae1bd224de /lib/CodeGen/MachineFunction.cpp | |
| parent | 6f8c6852a08df9d41f4e0242624ec744cd7e0d2f (diff) | |
Teach X86 MC instruction lowering that VMOVAPSrr and other VEX-encoded register to register moves should be switched from using the MRMSrcReg form to the MRMDestReg form if the source register is a 64-bit extended register and the destination register is not. This allows the instruction to be encoded using the 2-byte VEX form instead of the 3-byte VEX form. The GNU assembler has similar behavior.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@177011 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/CodeGen/MachineFunction.cpp')
0 files changed, 0 insertions, 0 deletions