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| author | Chris Lattner <sabre@nondot.org> | 2010-03-04 19:48:19 +0000 |
|---|---|---|
| committer | Chris Lattner <sabre@nondot.org> | 2010-03-04 19:48:19 +0000 |
| commit | 225d4ca8ab7c7d0e7fa0c7d43d95308b16edc554 (patch) | |
| tree | b8ba72157f506ac87f257f96246f26be28f4b69a /lib/CodeGen/MachineCSE.cpp | |
| parent | c19ae9d91d30bc008e0be5f5d4727f333199f64c (diff) | |
make gep matching in fastisel match the base of the gep as a
register if it isn't possible to match the indexes *and* the base.
This fixes some fast isel rejects of load instructions on oggenc.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97739 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/CodeGen/MachineCSE.cpp')
0 files changed, 0 insertions, 0 deletions