diff options
author | Jakob Stoklund Olesen <stoklund@2pi.dk> | 2009-08-08 13:19:10 +0000 |
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committer | Jakob Stoklund Olesen <stoklund@2pi.dk> | 2009-08-08 13:19:10 +0000 |
commit | 9390cd0e86cb3b79f6836acab2a27b275e5bde9e (patch) | |
tree | b19a164db68eeee7f29fc43bb60d91c40b14d583 /lib/CodeGen/LowerSubregs.cpp | |
parent | dffb051c21d32209c601ca0ca6baae75b6c6463f (diff) |
Remove RegisterScavenger::isSuperRegUsed(). This completely reverses the mistaken commit r77904.
Now there is no special treatment of instructions that redefine part of a
super-register. Instead, the super-register is marked with <imp-use,kill> and
<imp-def>. For instance, from LowerSubregs on ARM:
subreg: CONVERTING: %Q1<def> = INSERT_SUBREG %Q1<undef>, %D1<kill>, 5
subreg: %D2<def> = FCPYD %D1<kill>, 14, %reg0, %Q1<imp-def>
subreg: CONVERTING: %Q1<def> = INSERT_SUBREG %Q1, %D0<kill>, 6
subreg: %D3<def> = FCPYD %D0<kill>, 14, %reg0, %Q1<imp-use,kill>, %Q1<imp-def>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78466 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/CodeGen/LowerSubregs.cpp')
-rw-r--r-- | lib/CodeGen/LowerSubregs.cpp | 13 |
1 files changed, 7 insertions, 6 deletions
diff --git a/lib/CodeGen/LowerSubregs.cpp b/lib/CodeGen/LowerSubregs.cpp index 6c5052a068..f34b29041f 100644 --- a/lib/CodeGen/LowerSubregs.cpp +++ b/lib/CodeGen/LowerSubregs.cpp @@ -270,14 +270,15 @@ bool LowerSubregsInstructionPass::LowerInsert(MachineInstr *MI) { MachineBasicBlock::iterator CopyMI = MI; --CopyMI; + // INSERT_SUBREG is a two-address instruction so it implicitly kills SrcReg. + if (!MI->getOperand(1).isUndef()) + CopyMI->addOperand(MachineOperand::CreateReg(DstReg, false, true, true)); + // Transfer the kill/dead flags, if needed. if (MI->getOperand(0).isDead()) { TransferDeadFlag(MI, DstSubReg, TRI); - // Also add a SrcReg<imp-kill> of the super register. - CopyMI->addOperand(MachineOperand::CreateReg(DstReg, false, true, true)); - } else if (MI->getOperand(1).isUndef()) { - // If SrcReg was marked <undef> we must make sure it is alive after this - // replacement. Add a SrcReg<imp-def> operand. + } else { + // Make sure the full DstReg is live after this replacement. CopyMI->addOperand(MachineOperand::CreateReg(DstReg, true, true)); } @@ -293,7 +294,7 @@ bool LowerSubregsInstructionPass::LowerInsert(MachineInstr *MI) { DOUT << "\n"; MBB->erase(MI); - return true; + return true; } /// runOnMachineFunction - Reduce subregister inserts and extracts to register |