diff options
| author | Alkis Evlogimenos <alkis@evlogimenos.com> | 2004-02-26 22:00:20 +0000 |
|---|---|---|
| committer | Alkis Evlogimenos <alkis@evlogimenos.com> | 2004-02-26 22:00:20 +0000 |
| commit | 71e353ed3530a5da48c3dd3257c410f6c4ce2e3e (patch) | |
| tree | 6dd111fd83e0cf39d8b46be6afe448d8bbbb8c84 /lib/CodeGen/LiveVariables.cpp | |
| parent | 0550256c3185f58faef04812a40824f6721a2ddf (diff) | |
Uncomment assertions that register# != 0 on calls to
MRegisterInfo::is{Physical,Virtual}Register. Apply appropriate fixes
to relevant files.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11882 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/CodeGen/LiveVariables.cpp')
| -rw-r--r-- | lib/CodeGen/LiveVariables.cpp | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/lib/CodeGen/LiveVariables.cpp b/lib/CodeGen/LiveVariables.cpp index 361b5038a2..35c64e2548 100644 --- a/lib/CodeGen/LiveVariables.cpp +++ b/lib/CodeGen/LiveVariables.cpp @@ -232,7 +232,7 @@ bool LiveVariables::runOnMachineFunction(MachineFunction &MF) { // Process all explicit uses... for (unsigned i = 0; i != NumOperandsToProcess; ++i) { MachineOperand &MO = MI->getOperand(i); - if (MO.isUse() && MO.isRegister()) { + if (MO.isUse() && MO.isRegister() && MO.getReg()) { if (MRegisterInfo::isVirtualRegister(MO.getReg())){ HandleVirtRegUse(getVarInfo(MO.getReg()), MBB, MI); } else if (MRegisterInfo::isPhysicalRegister(MO.getReg()) && @@ -250,7 +250,7 @@ bool LiveVariables::runOnMachineFunction(MachineFunction &MF) { // Process all explicit defs... for (unsigned i = 0; i != NumOperandsToProcess; ++i) { MachineOperand &MO = MI->getOperand(i); - if (MO.isDef() && MO.isRegister()) { + if (MO.isDef() && MO.isRegister() && MO.getReg()) { if (MRegisterInfo::isVirtualRegister(MO.getReg())) { VarInfo &VRInfo = getVarInfo(MO.getReg()); @@ -325,7 +325,7 @@ void LiveVariables::instructionChanged(MachineInstr *OldMI, // the instruction. for (unsigned i = 0, e = NewMI->getNumOperands(); i != e; ++i) { MachineOperand &MO = NewMI->getOperand(i); - if (MO.isRegister() && MO.isDef() && + if (MO.isRegister() && MO.isDef() && MO.getReg() && MRegisterInfo::isVirtualRegister(MO.getReg())) { unsigned Reg = MO.getReg(); VarInfo &VI = getVarInfo(Reg); |