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authorChristopher Lamb <christopher.lamb@gmail.com>2007-07-26 08:18:32 +0000
committerChristopher Lamb <christopher.lamb@gmail.com>2007-07-26 08:18:32 +0000
commitbab2474b64e81be0ed4fc35d16cdfac65f283361 (patch)
tree1d40ee8087365cadd4070d9bd6c73984c3bd8a0a /lib/CodeGen/LLVMTargetMachine.cpp
parente24f8f1ec9277dc80ebf38f0d914053f8c31caf1 (diff)
Add a MachineFunction pass, which runs post register allocation, that turns subreg insert/extract instruction into register copies. This ensures correct code gen if the coalescer isn't able to remove all subreg instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40521 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/CodeGen/LLVMTargetMachine.cpp')
-rw-r--r--lib/CodeGen/LLVMTargetMachine.cpp4
1 files changed, 4 insertions, 0 deletions
diff --git a/lib/CodeGen/LLVMTargetMachine.cpp b/lib/CodeGen/LLVMTargetMachine.cpp
index 218e79ac72..4620abb721 100644
--- a/lib/CodeGen/LLVMTargetMachine.cpp
+++ b/lib/CodeGen/LLVMTargetMachine.cpp
@@ -96,6 +96,8 @@ LLVMTargetMachine::addPassesToEmitFile(FunctionPassManager &PM,
if (addPreEmitPass(PM, Fast) && PrintMachineCode)
PM.add(createMachineFunctionPrinterPass(cerr));
+
+ PM.add(createLowerSubregsPass());
switch (FileType) {
default:
@@ -197,6 +199,8 @@ bool LLVMTargetMachine::addPassesToEmitMachineCode(FunctionPassManager &PM,
if (addPreEmitPass(PM, Fast) && PrintMachineCode)
PM.add(createMachineFunctionPrinterPass(cerr));
+
+ PM.add(createLowerSubregsPass());
addCodeEmitter(PM, Fast, PrintEmittedAsm, MCE);