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authorVikram S. Adve <vadve@cs.uiuc.edu>2001-11-14 18:49:45 +0000
committerVikram S. Adve <vadve@cs.uiuc.edu>2001-11-14 18:49:45 +0000
commitecd5813639e305d55ce8c2e3517228e819d5817b (patch)
tree9e0e4ca35dd78c6ae256731fdebe7ab64e79bf76 /lib/CodeGen/InstrSelection/InstrSelectionSupport.cpp
parent4c5fe2d3ed4043c34f3305c081297ba4ca26ddc2 (diff)
Don't assume constant operand can only be in position 1!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@1308 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/CodeGen/InstrSelection/InstrSelectionSupport.cpp')
-rw-r--r--lib/CodeGen/InstrSelection/InstrSelectionSupport.cpp4
1 files changed, 2 insertions, 2 deletions
diff --git a/lib/CodeGen/InstrSelection/InstrSelectionSupport.cpp b/lib/CodeGen/InstrSelection/InstrSelectionSupport.cpp
index c7d4260087..853fe0f310 100644
--- a/lib/CodeGen/InstrSelection/InstrSelectionSupport.cpp
+++ b/lib/CodeGen/InstrSelection/InstrSelectionSupport.cpp
@@ -333,9 +333,9 @@ FixConstantOperandsForInstr(Instruction* vmInstr,
int64_t immedValue;
MachineOperand::MachineOperandType opType =
ChooseRegOrImmed(opValue, minstr->getOpCode(), target,
- /*canUseImmed*/ (op == 1),
+ (target.getInstrInfo().getImmmedConstantPos(minstr->getOpCode()) == (int) op),
machineRegNum, immedValue);
-
+
if (opType == MachineOperand::MO_MachineRegister)
minstr->SetMachineOperand(op, machineRegNum);
else if (opType == MachineOperand::MO_VirtualRegister)