diff options
author | Vikram S. Adve <vadve@cs.uiuc.edu> | 2001-11-05 04:04:23 +0000 |
---|---|---|
committer | Vikram S. Adve <vadve@cs.uiuc.edu> | 2001-11-05 04:04:23 +0000 |
commit | c352d2c530d88e2f3960eefec65c2b70de40579a (patch) | |
tree | f506639f39adcba1ed5c32d50331b4d77e2a79aa /lib/CodeGen/InstrSched/SchedGraph.h | |
parent | df1c3b8398d1df253ebd389ac1068ec732a2f28f (diff) |
Modified graph construction to use one pass to find all defs.
Avoids having to handle some special cases that cause complex interactions
with instr. selection.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@1138 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/CodeGen/InstrSched/SchedGraph.h')
-rw-r--r-- | lib/CodeGen/InstrSched/SchedGraph.h | 20 |
1 files changed, 15 insertions, 5 deletions
diff --git a/lib/CodeGen/InstrSched/SchedGraph.h b/lib/CodeGen/InstrSched/SchedGraph.h index 27014ad21d..ecb72b6c33 100644 --- a/lib/CodeGen/InstrSched/SchedGraph.h +++ b/lib/CodeGen/InstrSched/SchedGraph.h @@ -34,6 +34,8 @@ class SchedGraphEdge; class SchedGraphNode; class SchedGraph; class RegToRefVecMap; +class ValueToDefVecMap; +class RefVec; class MachineInstr; class MachineCodeForBasicBlock; @@ -299,11 +301,19 @@ private: void buildGraph (const TargetMachine& target); void buildNodesforVMInstr (const TargetMachine& target, - const Instruction* instr); - + const Instruction* instr, + vector<const Instruction*>& memVec, + RegToRefVecMap& regToRefVecMap, + ValueToDefVecMap& valueToDefVecMap); + + void findDefUseInfoAtInstr (const TargetMachine& target, + SchedGraphNode* node, + RegToRefVecMap& regToRefVecMap, + ValueToDefVecMap& valueToDefVecMap); + void addEdgesForInstruction (const MachineInstr& minstr, - RegToRefVecMap& regToRefVecMap, - const TargetMachine& target); + const ValueToDefVecMap& valueToDefVecMap, + const TargetMachine& target); void addCDEdges (const TerminatorInst* term, const TargetMachine& target); @@ -319,7 +329,7 @@ private: const TargetMachine& target); void addSSAEdge (SchedGraphNode* node, - const Instruction* defVMInstr, + const RefVec& defVec, const Value* defValue, const TargetMachine& target); |