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authorBill Schmidt <wschmidt@linux.vnet.ibm.com>2012-10-10 21:25:01 +0000
committerBill Schmidt <wschmidt@linux.vnet.ibm.com>2012-10-10 21:25:01 +0000
commit26160f4e6403f3ddd7c4599422578cb46777103d (patch)
tree932119198bde25a7908b03c96ca07b03a12b427f /lib/Analysis/ScalarEvolutionExpander.cpp
parenta5d0ab555384baa293b06686bec5a01fb9638ca3 (diff)
When generating spill and reload code for vector registers on PowerPC,
the compiler makes use of GPR0. However, there are two flavors of GPR0 defined by the target: the 32-bit GPR0 (R0) and the 64-bit GPR0 (X0). The spill/reload code makes use of R0 regardless of whether we are generating 32- or 64-bit code. This patch corrects the problem in the obvious manner, using X0 and ADDI8 for 64-bit and R0 and ADDI for 32-bit. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165658 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Analysis/ScalarEvolutionExpander.cpp')
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