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authorAndrew Lenharth <andrewl@lenharth.org>2005-10-09 20:11:35 +0000
committerAndrew Lenharth <andrewl@lenharth.org>2005-10-09 20:11:35 +0000
commitfa08fb2c782bb8c79b8b1503996d1193a772fcdb (patch)
tree0d864f8e3daed9f3c7ee02e16abcde7028783e44
parent60de63d0b615bfdb0f098a7c4b9bdd5f5b7429a0 (diff)
This seems useful from the original patch that added the function. If there is a reason it is not useful on a RISC type target, let me know and I will pull it out
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23676 91177308-0d34-0410-b5e6-96231b3b80d8
-rw-r--r--lib/Target/Alpha/AlphaRegisterInfo.cpp19
-rw-r--r--lib/Target/Alpha/AlphaRegisterInfo.h2
2 files changed, 21 insertions, 0 deletions
diff --git a/lib/Target/Alpha/AlphaRegisterInfo.cpp b/lib/Target/Alpha/AlphaRegisterInfo.cpp
index ac7d3f146f..c348fa9ce4 100644
--- a/lib/Target/Alpha/AlphaRegisterInfo.cpp
+++ b/lib/Target/Alpha/AlphaRegisterInfo.cpp
@@ -107,6 +107,25 @@ AlphaRegisterInfo::loadRegFromStackSlot(MachineBasicBlock &MBB,
abort();
}
+unsigned
+AlphaRegisterInfo::isLoadFromStackSlot(MachineInstr *MI, int &FrameIndex) const
+{
+ switch (MI->getOpcode()) {
+ case Alpha::LDL:
+ case Alpha::LDQ:
+ case Alpha::LDBU:
+ case Alpha::LDWU:
+ case Alpha::LDS:
+ case Alpha::LDT:
+ if (MI->getOperand(1).isFrameIndex()) {
+ FrameIndex = MI->getOperand(1).getFrameIndex();
+ return MI->getOperand(0).getReg();
+ }
+ break;
+ }
+ return 0;
+}
+
void AlphaRegisterInfo::copyRegToReg(MachineBasicBlock &MBB,
MachineBasicBlock::iterator MI,
unsigned DestReg, unsigned SrcReg,
diff --git a/lib/Target/Alpha/AlphaRegisterInfo.h b/lib/Target/Alpha/AlphaRegisterInfo.h
index 0d8c24a50e..8be85cc7c6 100644
--- a/lib/Target/Alpha/AlphaRegisterInfo.h
+++ b/lib/Target/Alpha/AlphaRegisterInfo.h
@@ -34,6 +34,8 @@ struct AlphaRegisterInfo : public AlphaGenRegisterInfo {
MachineBasicBlock::iterator MBBI,
unsigned DestReg, int FrameIndex,
const TargetRegisterClass *RC) const;
+
+ virtual unsigned isLoadFromStackSlot(MachineInstr *MI, int &FrameIndex) const;
void copyRegToReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI,
unsigned DestReg, unsigned SrcReg,