diff options
author | Duraid Madina <duraid@octopus.com.au> | 2007-06-27 09:01:14 +0000 |
---|---|---|
committer | Duraid Madina <duraid@octopus.com.au> | 2007-06-27 09:01:14 +0000 |
commit | df82c93f2a37f9f52c8210eef9404b4a265a415f (patch) | |
tree | a9c3398c439f5ede14476f41bc47dc7864ac7dfe | |
parent | b2efabd5716dbeccf9ffc0632e76aa378302e2a2 (diff) |
ok, this is something of a dirty hack, but it seems to work. (fixes e.g.
the SPASS miscompilation)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37750 91177308-0d34-0410-b5e6-96231b3b80d8
-rw-r--r-- | lib/CodeGen/RegAllocBigBlock.cpp | 18 |
1 files changed, 16 insertions, 2 deletions
diff --git a/lib/CodeGen/RegAllocBigBlock.cpp b/lib/CodeGen/RegAllocBigBlock.cpp index 400d72ae51..c7f23f51d4 100644 --- a/lib/CodeGen/RegAllocBigBlock.cpp +++ b/lib/CodeGen/RegAllocBigBlock.cpp @@ -459,9 +459,23 @@ unsigned RABigBlock::chooseReg(MachineBasicBlock &MBB, MachineInstr *I, } } } + + if(PhysReg == 0) { // ok, now we're desperate. We couldn't choose + // a register to spill by looking through the + // read timetable, so now we just spill the + // first allocatable register we find. + + // for all physical regs in the RC, + for(TargetRegisterClass::iterator pReg = RC->begin(); + pReg != RC->end(); ++pReg) { + // if we find a register we can spill + if(PhysRegsUsed[*pReg]>=-1) + PhysReg = *pReg; // choose it to be spilled + } + } - assert(PhysReg && "couldn't grab a register from the table?"); - // TODO: assert that RC->contains(PhysReg) / handle aliased registers + assert(PhysReg && "couldn't choose a register to spill :( "); + // TODO: assert that RC->contains(PhysReg) / handle aliased registers? // since we needed to look in the table we need to spill this register. spillPhysReg(MBB, I, PhysReg); |