diff options
| author | Bob Wilson <bob.wilson@apple.com> | 2010-05-25 03:36:52 +0000 |
|---|---|---|
| committer | Bob Wilson <bob.wilson@apple.com> | 2010-05-25 03:36:52 +0000 |
| commit | ab3912e3ce5a58a6dbdc2780ae489162faa5452d (patch) | |
| tree | b16615814a7ccb2a800622c295d4c91267423586 | |
| parent | b7a31709171ba42d83d2fb575818e7ccd900fb03 (diff) | |
Clean up indentation.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104580 91177308-0d34-0410-b5e6-96231b3b80d8
| -rw-r--r-- | lib/Target/ARM/ARMISelLowering.cpp | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/lib/Target/ARM/ARMISelLowering.cpp b/lib/Target/ARM/ARMISelLowering.cpp index 768ffb9b6d..0b86e3808c 100644 --- a/lib/Target/ARM/ARMISelLowering.cpp +++ b/lib/Target/ARM/ARMISelLowering.cpp @@ -2395,9 +2395,9 @@ static SDValue LowerShift(SDNode *N, SelectionDAG &DAG, // Okay, we have a 64-bit SRA or SRL of 1. Lower this to an RRX expr. SDValue Lo = DAG.getNode(ISD::EXTRACT_ELEMENT, dl, MVT::i32, N->getOperand(0), - DAG.getConstant(0, MVT::i32)); + DAG.getConstant(0, MVT::i32)); SDValue Hi = DAG.getNode(ISD::EXTRACT_ELEMENT, dl, MVT::i32, N->getOperand(0), - DAG.getConstant(1, MVT::i32)); + DAG.getConstant(1, MVT::i32)); // First, build a SRA_FLAG/SRL_FLAG op, which shifts the top part by one and // captures the result into a carry flag. |