Merging the linear scan register allocator in trunk. It currently passes most tests under test/Programs/SingleSource/Benchmarks/Shootout so development will continue on trunk. The allocator is not enabled by default. You will need to pass -regallo=linearscan to lli or llc to use it.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@10103 91177308-0d34-0410-b5e6-96231b3b80d8

7 files changed, 1724 insertions, 4 deletions

diff --git a/include/llvm/CodeGen/LiveIntervalAnalysis.h b/include/llvm/CodeGen/LiveIntervalAnalysis.h
new file mode 100644
index 0000000000..b2f0416312
--- /dev/null
+++ b/include/llvm/CodeGen/LiveIntervalAnalysis.h
@@ -0,0 +1,211 @@
+//===-- llvm/CodeGen/LiveInterval.h - Live Interval Analysis ----*- C++ -*-===//
+//
+//                     The LLVM Compiler Infrastructure
+//
+// This file was developed by the LLVM research group and is distributed under
+// the University of Illinois Open Source License. See LICENSE.TXT for details.
+//
+//===----------------------------------------------------------------------===//
+//
+// This file implements the LiveInterval analysis pass.  Given some
+// numbering of each the machine instructions (in this implemention
+// depth-first order) an interval [i, j] is said to be a live interval
+// for register v if there is no instruction with number j' > j such
+// that v is live at j' abd there is no instruction with number i' < i
+// such that v is live at i'. In this implementation intervals can
+// have holes, i.e. an interval might look like [1,20], [50,65],
+// [1000,1001]
+//
+//===----------------------------------------------------------------------===//
+
+#ifndef LLVM_CODEGEN_LIVEINTERVALS_H
+#define LLVM_CODEGEN_LIVEINTERVALS_H
+
+#include "llvm/CodeGen/MachineFunctionPass.h"
+#include "llvm/CodeGen/MachineBasicBlock.h"
+#include <iostream>
+#include <map>
+
+namespace llvm {
+
+    class LiveVariables;
+    class MRegisterInfo;
+
+    class LiveIntervals : public MachineFunctionPass
+    {
+    public:
+        struct Interval {
+            typedef std::pair<unsigned, unsigned> Range;
+            typedef std::vector<Range> Ranges;
+            unsigned reg;   // the register of this interval
+            Ranges ranges; // the ranges this register is valid
+
+            Interval(unsigned r)
+                : reg(r) {
+
+            }
+
+            unsigned start() const {
+                assert(!ranges.empty() && "empty interval for register");
+                return ranges.front().first;
+            }
+
+            unsigned end() const {
+                assert(!ranges.empty() && "empty interval for register");
+                return ranges.back().second;
+            }
+
+            bool expired(unsigned index) const {
+                return end() <= index;
+            }
+
+            bool overlaps(unsigned index) const {
+                for (Ranges::const_iterator
+                         i = ranges.begin(), e = ranges.end(); i != e; ++i) {
+                    if (index >= i->first && index < i->second) {
+                        return true;
+                    }
+                }
+                return false;
+            }
+
+            void addRange(unsigned start, unsigned end) {
+                Range range = std::make_pair(start, end);
+                Ranges::iterator it =
+                    std::lower_bound(ranges.begin(), ranges.end(), range);
+
+                if (it == ranges.end()) {
+                    it = ranges.insert(it, range);
+                    goto exit;
+                }
+
+                assert(range.first <= it->first && "got wrong iterator?");
+                // merge ranges if necesary
+                if (range.first < it->first) {
+                    if (range.second >= it->first) {
+                        it->first = range.first;
+                    }
+                    else {
+                        it = ranges.insert(it, range);
+                        assert(it != ranges.end() && "wtf?");
+                        goto exit;
+                    }
+                }
+
+            exit:
+                mergeRangesIfNecessary(it);
+            }
+
+        private:
+            void mergeRangesIfNecessary(Ranges::iterator it) {
+                while (it != ranges.begin()) {
+                    Ranges::iterator prev = it - 1;
+                    if (prev->second < it->first) {
+                        break;
+                    }
+                    prev->second = it->second;
+                    ranges.erase(it);
+                    it = prev;
+                }
+            }
+        };
+
+        struct StartPointComp {
+            bool operator()(const Interval& lhs, const Interval& rhs) {
+                return lhs.ranges.front().first < rhs.ranges.front().first;
+            }
+        };
+
+        struct EndPointComp {
+            bool operator()(const Interval& lhs, const Interval& rhs) {
+                return lhs.ranges.back().second < rhs.ranges.back().second;
+            }
+        };
+
+        typedef std::vector<Interval> Intervals;
+        typedef std::vector<MachineBasicBlock*> MachineBasicBlockPtrs;
+
+    private:
+        MachineFunction* mf_;
+        const TargetMachine* tm_;
+        const MRegisterInfo* mri_;
+        MachineBasicBlock* currentMbb_;
+        MachineBasicBlock::iterator currentInstr_;
+        LiveVariables* lv_;
+
+        std::vector<bool> allocatableRegisters_;
+
+        typedef std::map<unsigned, MachineBasicBlock*> MbbIndex2MbbMap;
+        MbbIndex2MbbMap mbbi2mbbMap_;
+
+        typedef std::map<MachineInstr*, unsigned> Mi2IndexMap;
+        Mi2IndexMap mi2iMap_;
+
+        typedef std::map<unsigned, unsigned> Reg2IntervalMap;
+        Reg2IntervalMap r2iMap_;
+
+        Intervals intervals_;
+
+    public:
+        virtual void getAnalysisUsage(AnalysisUsage &AU) const;
+        Intervals& getIntervals() { return intervals_; }
+        MachineBasicBlockPtrs getOrderedMachineBasicBlockPtrs() const {
+            MachineBasicBlockPtrs result;
+            for (MbbIndex2MbbMap::const_iterator
+                     it = mbbi2mbbMap_.begin(), itEnd = mbbi2mbbMap_.end();
+                 it != itEnd; ++it) {
+                result.push_back(it->second);
+            }
+            return result;
+        }
+
+    private:
+        /// runOnMachineFunction - pass entry point
+        bool runOnMachineFunction(MachineFunction&);
+
+        /// computeIntervals - compute live intervals
+        void computeIntervals();
+
+
+        /// handleRegisterDef - update intervals for a register def
+        /// (calls handlePhysicalRegisterDef and
+        /// handleVirtualRegisterDef)
+        void handleRegisterDef(MachineBasicBlock* mbb,
+                               MachineBasicBlock::iterator mi,
+                               unsigned reg);
+
+        /// handleVirtualRegisterDef - update intervals for a virtual
+        /// register def
+        void handleVirtualRegisterDef(MachineBasicBlock* mbb,
+                                      MachineBasicBlock::iterator mi,
+                                      unsigned reg);
+
+        /// handlePhysicalRegisterDef - update intervals for a
+        /// physical register def
+        void handlePhysicalRegisterDef(MachineBasicBlock* mbb,
+                                       MachineBasicBlock::iterator mi,
+                                       unsigned reg);
+
+        unsigned getInstructionIndex(MachineInstr* instr) const;
+
+        void printRegName(unsigned reg) const;
+    };
+
+    inline bool operator==(const LiveIntervals::Interval& lhs,
+                           const LiveIntervals::Interval& rhs) {
+        return lhs.reg == rhs.reg;
+    }
+
+    inline std::ostream& operator<<(std::ostream& os,
+                                    const LiveIntervals::Interval& li) {
+        os << "%reg" << li.reg << " = ";
+        for (LiveIntervals::Interval::Ranges::const_iterator
+                 i = li.ranges.begin(), e = li.ranges.end(); i != e; ++i) {
+            os << "[" << i->first << ", " << i->second << "]";
+        }
+        return os;
+    }
+
+} // End llvm namespace
+
+#endif
diff --git a/include/llvm/CodeGen/LiveIntervals.h b/include/llvm/CodeGen/LiveIntervals.h
new file mode 100644
index 0000000000..b2f0416312
--- /dev/null
+++ b/include/llvm/CodeGen/LiveIntervals.h
@@ -0,0 +1,211 @@
+//===-- llvm/CodeGen/LiveInterval.h - Live Interval Analysis ----*- C++ -*-===//
+//
+//                     The LLVM Compiler Infrastructure
+//
+// This file was developed by the LLVM research group and is distributed under
+// the University of Illinois Open Source License. See LICENSE.TXT for details.
+//
+//===----------------------------------------------------------------------===//
+//
+// This file implements the LiveInterval analysis pass.  Given some
+// numbering of each the machine instructions (in this implemention
+// depth-first order) an interval [i, j] is said to be a live interval
+// for register v if there is no instruction with number j' > j such
+// that v is live at j' abd there is no instruction with number i' < i
+// such that v is live at i'. In this implementation intervals can
+// have holes, i.e. an interval might look like [1,20], [50,65],
+// [1000,1001]
+//
+//===----------------------------------------------------------------------===//
+
+#ifndef LLVM_CODEGEN_LIVEINTERVALS_H
+#define LLVM_CODEGEN_LIVEINTERVALS_H
+
+#include "llvm/CodeGen/MachineFunctionPass.h"
+#include "llvm/CodeGen/MachineBasicBlock.h"
+#include <iostream>
+#include <map>
+
+namespace llvm {
+
+    class LiveVariables;
+    class MRegisterInfo;
+
+    class LiveIntervals : public MachineFunctionPass
+    {
+    public:
+        struct Interval {
+            typedef std::pair<unsigned, unsigned> Range;
+            typedef std::vector<Range> Ranges;
+            unsigned reg;   // the register of this interval
+            Ranges ranges; // the ranges this register is valid
+
+            Interval(unsigned r)
+                : reg(r) {
+
+            }
+
+            unsigned start() const {
+                assert(!ranges.empty() && "empty interval for register");
+                return ranges.front().first;
+            }
+
+            unsigned end() const {
+                assert(!ranges.empty() && "empty interval for register");
+                return ranges.back().second;
+            }
+
+            bool expired(unsigned index) const {
+                return end() <= index;
+            }
+
+            bool overlaps(unsigned index) const {
+                for (Ranges::const_iterator
+                         i = ranges.begin(), e = ranges.end(); i != e; ++i) {
+                    if (index >= i->first && index < i->second) {
+                        return true;
+                    }
+                }
+                return false;
+            }
+
+            void addRange(unsigned start, unsigned end) {
+                Range range = std::make_pair(start, end);
+                Ranges::iterator it =
+                    std::lower_bound(ranges.begin(), ranges.end(), range);
+
+                if (it == ranges.end()) {
+                    it = ranges.insert(it, range);
+                    goto exit;
+                }
+
+                assert(range.first <= it->first && "got wrong iterator?");
+                // merge ranges if necesary
+                if (range.first < it->first) {
+                    if (range.second >= it->first) {
+                        it->first = range.first;
+                    }
+                    else {
+                        it = ranges.insert(it, range);
+                        assert(it != ranges.end() && "wtf?");
+                        goto exit;
+                    }
+                }
+
+            exit:
+                mergeRangesIfNecessary(it);
+            }
+
+        private:
+            void mergeRangesIfNecessary(Ranges::iterator it) {
+                while (it != ranges.begin()) {
+                    Ranges::iterator prev = it - 1;
+                    if (prev->second < it->first) {
+                        break;
+                    }
+                    prev->second = it->second;
+                    ranges.erase(it);
+                    it = prev;
+                }
+            }
+        };
+
+        struct StartPointComp {
+            bool operator()(const Interval& lhs, const Interval& rhs) {
+                return lhs.ranges.front().first < rhs.ranges.front().first;
+            }
+        };
+
+        struct EndPointComp {
+            bool operator()(const Interval& lhs, const Interval& rhs) {
+                return lhs.ranges.back().second < rhs.ranges.back().second;
+            }
+        };
+
+        typedef std::vector<Interval> Intervals;
+        typedef std::vector<MachineBasicBlock*> MachineBasicBlockPtrs;
+
+    private:
+        MachineFunction* mf_;
+        const TargetMachine* tm_;
+        const MRegisterInfo* mri_;
+        MachineBasicBlock* currentMbb_;
+        MachineBasicBlock::iterator currentInstr_;
+        LiveVariables* lv_;
+
+        std::vector<bool> allocatableRegisters_;
+
+        typedef std::map<unsigned, MachineBasicBlock*> MbbIndex2MbbMap;
+        MbbIndex2MbbMap mbbi2mbbMap_;
+
+        typedef std::map<MachineInstr*, unsigned> Mi2IndexMap;
+        Mi2IndexMap mi2iMap_;
+
+        typedef std::map<unsigned, unsigned> Reg2IntervalMap;
+        Reg2IntervalMap r2iMap_;
+
+        Intervals intervals_;
+
+    public:
+        virtual void getAnalysisUsage(AnalysisUsage &AU) const;
+        Intervals& getIntervals() { return intervals_; }
+        MachineBasicBlockPtrs getOrderedMachineBasicBlockPtrs() const {
+            MachineBasicBlockPtrs result;
+            for (MbbIndex2MbbMap::const_iterator
+                     it = mbbi2mbbMap_.begin(), itEnd = mbbi2mbbMap_.end();
+                 it != itEnd; ++it) {
+                result.push_back(it->second);
+            }
+            return result;
+        }
+
+    private:
+        /// runOnMachineFunction - pass entry point
+        bool runOnMachineFunction(MachineFunction&);
+
+        /// computeIntervals - compute live intervals
+        void computeIntervals();
+
+
+        /// handleRegisterDef - update intervals for a register def
+        /// (calls handlePhysicalRegisterDef and
+        /// handleVirtualRegisterDef)
+        void handleRegisterDef(MachineBasicBlock* mbb,
+                               MachineBasicBlock::iterator mi,
+                               unsigned reg);
+
+        /// handleVirtualRegisterDef - update intervals for a virtual
+        /// register def
+        void handleVirtualRegisterDef(MachineBasicBlock* mbb,
+                                      MachineBasicBlock::iterator mi,
+                                      unsigned reg);
+
+        /// handlePhysicalRegisterDef - update intervals for a
+        /// physical register def
+        void handlePhysicalRegisterDef(MachineBasicBlock* mbb,
+                                       MachineBasicBlock::iterator mi,
+                                       unsigned reg);
+
+        unsigned getInstructionIndex(MachineInstr* instr) const;
+
+        void printRegName(unsigned reg) const;
+    };
+
+    inline bool operator==(const LiveIntervals::Interval& lhs,
+                           const LiveIntervals::Interval& rhs) {
+        return lhs.reg == rhs.reg;
+    }
+
+    inline std::ostream& operator<<(std::ostream& os,
+                                    const LiveIntervals::Interval& li) {
+        os << "%reg" << li.reg << " = ";
+        for (LiveIntervals::Interval::Ranges::const_iterator
+                 i = li.ranges.begin(), e = li.ranges.end(); i != e; ++i) {
+            os << "[" << i->first << ", " << i->second << "]";
+        }
+        return os;
+    }
+
+} // End llvm namespace
+
+#endif
diff --git a/include/llvm/CodeGen/Passes.h b/include/llvm/CodeGen/Passes.h
index 11fcf29013..8868de13a4 100644
--- a/include/llvm/CodeGen/Passes.h
+++ b/include/llvm/CodeGen/Passes.h
@@ -44,12 +44,17 @@ FunctionPass *createSimpleRegisterAllocator();
 /// 
 FunctionPass *createLocalRegisterAllocator();
 
+/// LinearScanRegisterAllocation Pass - This pass implements the
+/// linear scan register allocation algorithm, a global register
+/// allocator.
+///
+FunctionPass *createLinearScanRegisterAllocator();
+
 /// PrologEpilogCodeInserter Pass - This pass inserts prolog and epilog code,
 /// and eliminates abstract frame references.
 ///
 FunctionPass *createPrologEpilogCodeInserter();
 
-
 /// getRegisterAllocator - This creates an instance of the register allocator
 /// for the Sparc.
 FunctionPass *getRegisterAllocator(TargetMachine &T);
diff --git a/lib/CodeGen/LiveIntervalAnalysis.cpp b/lib/CodeGen/LiveIntervalAnalysis.cpp
new file mode 100644
index 0000000000..eda717baeb
--- /dev/null
+++ b/lib/CodeGen/LiveIntervalAnalysis.cpp
@@ -0,0 +1,302 @@
+//===-- LiveIntervals.cpp - Live Interval Analysis ------------------------===//
+//
+//                     The LLVM Compiler Infrastructure
+//
+// This file was developed by the LLVM research group and is distributed under
+// the University of Illinois Open Source License. See LICENSE.TXT for details.
+//
+//===----------------------------------------------------------------------===//
+//
+// This file implements the LiveInterval analysis pass which is used
+// by the Linear Scan Register allocator. This pass linearizes the
+// basic blocks of the function in DFS order and uses the
+// LiveVariables pass to conservatively compute live intervals for
+// each virtual and physical register.
+//
+//===----------------------------------------------------------------------===//
+
+#define DEBUG_TYPE "liveintervals"
+#include "llvm/CodeGen/LiveIntervals.h"
+#include "llvm/Function.h"
+#include "llvm/CodeGen/LiveVariables.h"
+#include "llvm/CodeGen/MachineFrameInfo.h"
+#include "llvm/CodeGen/MachineFunctionPass.h"
+#include "llvm/CodeGen/MachineInstr.h"
+#include "llvm/CodeGen/Passes.h"
+#include "llvm/CodeGen/SSARegMap.h"
+#include "llvm/Target/MRegisterInfo.h"
+#include "llvm/Target/TargetInstrInfo.h"
+#include "llvm/Target/TargetMachine.h"
+#include "llvm/Target/TargetRegInfo.h"
+#include "llvm/Support/CFG.h"
+#include "Support/Debug.h"
+#include "Support/DepthFirstIterator.h"
+#include "Support/Statistic.h"
+#include <iostream>
+
+using namespace llvm;
+
+namespace {
+    RegisterAnalysis<LiveIntervals> X("liveintervals",
+                                      "Live Interval Analysis");
+
+    Statistic<> numIntervals("liveintervals", "Number of intervals");
+};
+
+void LiveIntervals::getAnalysisUsage(AnalysisUsage &AU) const
+{
+    AU.setPreservesAll();
+    AU.addRequired<LiveVariables>();
+    AU.addRequiredID(PHIEliminationID);
+    MachineFunctionPass::getAnalysisUsage(AU);
+}
+
+/// runOnMachineFunction - Register allocate the whole function
+///
+bool LiveIntervals::runOnMachineFunction(MachineFunction &fn) {
+    DEBUG(std::cerr << "Machine Function\n");
+    mf_ = &fn;
+    tm_ = &fn.getTarget();
+    mri_ = tm_->getRegisterInfo();
+    lv_ = &getAnalysis<LiveVariables>();
+    allocatableRegisters_.clear();
+    mbbi2mbbMap_.clear();
+    mi2iMap_.clear();
+    r2iMap_.clear();
+    r2iMap_.clear();
+    intervals_.clear();
+
+    // mark allocatable registers
+    allocatableRegisters_.resize(MRegisterInfo::FirstVirtualRegister);
+    // Loop over all of the register classes...
+    for (MRegisterInfo::regclass_iterator
+             rci = mri_->regclass_begin(), rce = mri_->regclass_end();
+         rci != rce; ++rci) {
+        // Loop over all of the allocatable registers in the function...
+        for (TargetRegisterClass::iterator
+                 i = (*rci)->allocation_order_begin(*mf_),
+                 e = (*rci)->allocation_order_end(*mf_); i != e; ++i) {
+            allocatableRegisters_[*i] = true;  // The reg is allocatable!
+        }
+    }
+
+    // number MachineInstrs
+    unsigned miIndex = 0;
+    for (MachineFunction::iterator mbb = mf_->begin(), mbbEnd = mf_->end();
+         mbb != mbbEnd; ++mbb) {
+        const std::pair<MachineBasicBlock*, unsigned>& entry =
+            lv_->getMachineBasicBlockInfo(&*mbb);
+        bool inserted = mbbi2mbbMap_.insert(std::make_pair(entry.second,
+                                                           entry.first)).second;
+        assert(inserted && "multiple index -> MachineBasicBlock");
+
+        for (MachineBasicBlock::iterator mi = mbb->begin(), miEnd = mbb->end();
+             mi != miEnd; ++mi) {
+            inserted = mi2iMap_.insert(std::make_pair(*mi, miIndex)).second;
+            assert(inserted && "multiple MachineInstr -> index mappings");
+            ++miIndex;
+        }
+    }
+
+    computeIntervals();
+
+    return true;
+}
+
+void LiveIntervals::printRegName(unsigned reg) const
+{
+    if (reg < MRegisterInfo::FirstVirtualRegister)
+        std::cerr << mri_->getName(reg);
+    else
+        std::cerr << '%' << reg;
+}
+
+void LiveIntervals::handleVirtualRegisterDef(MachineBasicBlock* mbb,
+                                             MachineBasicBlock::iterator mi,
+                                             unsigned reg)
+{
+    DEBUG(std::cerr << "\t\t\tregister: ";printRegName(reg); std::cerr << '\n');
+
+    unsigned instrIndex = getInstructionIndex(*mi);
+
+    LiveVariables::VarInfo& vi = lv_->getVarInfo(reg);
+
+    Reg2IntervalMap::iterator r2iit = r2iMap_.find(reg);
+    // handle multiple definition case (machine instructions violating
+    // ssa after phi-elimination
+    if (r2iit != r2iMap_.end()) {
+        unsigned ii = r2iit->second;
+        Interval& interval = intervals_[ii];
+        unsigned end = getInstructionIndex(mbb->back()) + 1;
+        DEBUG(std::cerr << "\t\t\t\tadding range: ["
+              << instrIndex << ',' << end << "]\n");
+        interval.addRange(instrIndex, end);
+        DEBUG(std::cerr << "\t\t\t\t" << interval << '\n');
+    }
+    else {
+        // add new interval
+        intervals_.push_back(Interval(reg));
+        Interval& interval = intervals_.back();
+        // update interval index for this register
+        r2iMap_[reg] = intervals_.size() - 1;
+
+        for (MbbIndex2MbbMap::iterator
+                 it = mbbi2mbbMap_.begin(), itEnd = mbbi2mbbMap_.end();
+             it != itEnd; ++it) {
+            unsigned liveBlockIndex = it->first;
+            MachineBasicBlock* liveBlock = it->second;
+            if (liveBlockIndex < vi.AliveBlocks.size() &&
+                vi.AliveBlocks[liveBlockIndex]) {
+                unsigned start =  getInstructionIndex(liveBlock->front());
+                unsigned end = getInstructionIndex(liveBlock->back()) + 1;
+                DEBUG(std::cerr << "\t\t\t\tadding range: ["
+                      << start << ',' << end << "]\n");
+                interval.addRange(start, end);
+            }
+        }
+
+        bool killedInDefiningBasicBlock = false;
+        for (int i = 0, e = vi.Kills.size(); i != e; ++i) {
+            MachineBasicBlock* killerBlock = vi.Kills[i].first;
+            MachineInstr* killerInstr = vi.Kills[i].second;
+            killedInDefiningBasicBlock |= mbb == killerBlock;
+            unsigned start = (mbb == killerBlock ?
+                              instrIndex :
+                              getInstructionIndex(killerBlock->front()));
+            unsigned end = getInstructionIndex(killerInstr) + 1;
+            DEBUG(std::cerr << "\t\t\t\tadding range: ["
+                  << start << ',' << end << "]\n");
+            interval.addRange(start, end);
+        }
+
+        if (!killedInDefiningBasicBlock) {
+            unsigned end = getInstructionIndex(mbb->back()) + 1;
+            interval.addRange(instrIndex, end);
+        }
+
+        DEBUG(std::cerr << "\t\t\t\t" << interval << '\n');
+    }
+}
+
+void LiveIntervals::handlePhysicalRegisterDef(MachineBasicBlock* mbb,
+                                              MachineBasicBlock::iterator mi,
+                                              unsigned reg)
+{
+    DEBUG(std::cerr << "\t\t\tregister: ";printRegName(reg); std::cerr << '\n');
+
+    unsigned start = getInstructionIndex(*mi);
+    unsigned end = start;
+
+    for (MachineBasicBlock::iterator e = mbb->end(); mi != e; ++mi) {
+        for (LiveVariables::killed_iterator
+                 ki = lv_->dead_begin(*mi),
+                 ke = lv_->dead_end(*mi);
+             ki != ke; ++ki) {
+            if (reg == ki->second) {
+                end = getInstructionIndex(ki->first) + 1;
+                goto exit;
+            }
+        }
+
+        for (LiveVariables::killed_iterator
+                 ki = lv_->killed_begin(*mi),
+                 ke = lv_->killed_end(*mi);
+             ki != ke; ++ki) {
+            if (reg == ki->second) {
+                end = getInstructionIndex(ki->first) + 1;
+                goto exit;
+            }
+        }
+    }
+exit:
+    assert(start < end && "did not find end of interval?");
+
+    Reg2IntervalMap::iterator r2iit = r2iMap_.find(reg);
+    if (r2iit != r2iMap_.end()) {
+        unsigned ii = r2iit->second;
+        Interval& interval = intervals_[ii];
+        DEBUG(std::cerr << "\t\t\t\tadding range: ["
+              << start << ',' << end << "]\n");
+        interval.addRange(start, end);
+        DEBUG(std::cerr << "\t\t\t\t" << interval << '\n');
+    }
+    else {
+        intervals_.push_back(Interval(reg));
+        Interval& interval = intervals_.back();
+        // update interval index for this register
+        r2iMap_[reg] = intervals_.size() - 1;
+        DEBUG(std::cerr << "\t\t\t\tadding range: ["
+              << start << ',' << end << "]\n");
+        interval.addRange(start, end);
+        DEBUG(std::cerr << "\t\t\t\t" << interval << '\n');
+    }
+}
+
+void LiveIntervals::handleRegisterDef(MachineBasicBlock* mbb,
+                                      MachineBasicBlock::iterator mi,
+                                      unsigned reg)
+{
+    if (reg < MRegisterInfo::FirstVirtualRegister) {
+        if (allocatableRegisters_[reg]) {
+            handlePhysicalRegisterDef(mbb, mi, reg);
+        }
+    }
+    else {
+        handleVirtualRegisterDef(mbb, mi, reg);
+    }
+}
+
+unsigned LiveIntervals::getInstructionIndex(MachineInstr* instr) const
+{
+    assert(mi2iMap_.find(instr) != mi2iMap_.end() &&
+           "instruction not assigned a number");
+    return mi2iMap_.find(instr)->second;
+}
+
+/// computeIntervals - computes the live intervals for virtual
+/// registers. for some ordering of the machine instructions [1,N] a
+/// live interval is an interval [i, j] where 1 <= i <= j <= N for
+/// which a variable is live
+void LiveIntervals::computeIntervals()
+{
+    DEBUG(std::cerr << "computing live intervals:\n");
+
+    for (MbbIndex2MbbMap::iterator
+             it = mbbi2mbbMap_.begin(), itEnd = mbbi2mbbMap_.end();
+         it != itEnd; ++it) {
+        MachineBasicBlock* mbb = it->second;
+        DEBUG(std::cerr << "machine basic block: "
+              << mbb->getBasicBlock()->getName() << "\n");
+        for (MachineBasicBlock::iterator mi = mbb->begin(), miEnd = mbb->end();
+             mi != miEnd; ++mi) {
+            MachineInstr* instr = *mi;
+            const TargetInstrDescriptor& tid =
+                tm_->getInstrInfo().get(instr->getOpcode());
+            DEBUG(std::cerr << "\t\tinstruction["
+                  << getInstructionIndex(instr) << "]: ";
+                  instr->print(std::cerr, *tm_););
+
+            // handle implicit defs
+            for (const unsigned* id = tid.ImplicitDefs; *id; ++id) {
+                unsigned physReg = *id;
+                handlePhysicalRegisterDef(mbb, mi, physReg);
+            }
+
+            // handle explicit defs
+            for (int i = instr->getNumOperands() - 1; i >= 0; --i) {
+                MachineOperand& mop = instr->getOperand(i);
+
+                if (!mop.isVirtualRegister())
+                    continue;
+
+                if (mop.opIsDefOnly() || mop.opIsDefAndUse()) {
+                    unsigned reg = mop.getAllocatedRegNum();
+                    handleVirtualRegisterDef(mbb, mi, reg);
+                }
+            }
+        }
+    }
+
+    DEBUG(std::copy(intervals_.begin(), intervals_.end(),
+                    std::ostream_iterator<Interval>(std::cerr, "\n")));
+}
diff --git a/lib/CodeGen/LiveIntervalAnalysis.h b/lib/CodeGen/LiveIntervalAnalysis.h
new file mode 100644
index 0000000000..b2f0416312
--- /dev/null
+++ b/lib/CodeGen/LiveIntervalAnalysis.h
@@ -0,0 +1,211 @@
+//===-- llvm/CodeGen/LiveInterval.h - Live Interval Analysis ----*- C++ -*-===//
+//
+//                     The LLVM Compiler Infrastructure
+//
+// This file was developed by the LLVM research group and is distributed under
+// the University of Illinois Open Source License. See LICENSE.TXT for details.
+//
+//===----------------------------------------------------------------------===//
+//
+// This file implements the LiveInterval analysis pass.  Given some
+// numbering of each the machine instructions (in this implemention
+// depth-first order) an interval [i, j] is said to be a live interval
+// for register v if there is no instruction with number j' > j such
+// that v is live at j' abd there is no instruction with number i' < i
+// such that v is live at i'. In this implementation intervals can
+// have holes, i.e. an interval might look like [1,20], [50,65],
+// [1000,1001]
+//
+//===----------------------------------------------------------------------===//
+
+#ifndef LLVM_CODEGEN_LIVEINTERVALS_H
+#define LLVM_CODEGEN_LIVEINTERVALS_H
+
+#include "llvm/CodeGen/MachineFunctionPass.h"
+#include "llvm/CodeGen/MachineBasicBlock.h"
+#include <iostream>
+#include <map>
+
+namespace llvm {
+
+    class LiveVariables;
+    class MRegisterInfo;
+
+    class LiveIntervals : public MachineFunctionPass
+    {
+    public:
+        struct Interval {
+            typedef std::pair<unsigned, unsigned> Range;
+            typedef std::vector<Range> Ranges;
+            unsigned reg;   // the register of this interval
+            Ranges ranges; // the ranges this register is valid
+
+            Interval(unsigned r)
+                : reg(r) {
+
+            }
+
+            unsigned start() const {
+                assert(!ranges.empty() && "empty interval for register");
+                return ranges.front().first;
+            }
+
+            unsigned end() const {
+                assert(!ranges.empty() && "empty interval for register");
+                return ranges.back().second;
+            }
+
+            bool expired(unsigned index) const {
+                return end() <= index;
+            }
+
+            bool overlaps(unsigned index) const {
+                for (Ranges::const_iterator
+                         i = ranges.begin(), e = ranges.end(); i != e; ++i) {
+                    if (index >= i->first && index < i->second) {
+                        return true;
+                    }
+                }
+                return false;
+            }
+
+            void addRange(unsigned start, unsigned end) {
+                Range range = std::make_pair(start, end);
+                Ranges::iterator it =
+                    std::lower_bound(ranges.begin(), ranges.end(), range);
+
+                if (it == ranges.end()) {
+                    it = ranges.insert(it, range);
+                    goto exit;
+                }
+
+                assert(range.first <= it->first && "got wrong iterator?");
+                // merge ranges if necesary
+                if (range.first < it->first) {
+                    if (range.second >= it->first) {
+                        it->first = range.first;
+                    }
+                    else {
+                        it = ranges.insert(it, range);
+                        assert(it != ranges.end() && "wtf?");
+                        goto exit;
+                    }
+                }
+
+            exit:
+                mergeRangesIfNecessary(it);
+            }
+
+        private:
+            void mergeRangesIfNecessary(Ranges::iterator it) {
+                while (it != ranges.begin()) {
+                    Ranges::iterator prev = it - 1;
+                    if (prev->second < it->first) {
+                        break;
+                    }
+                    prev->second = it->second;
+                    ranges.erase(it);
+                    it = prev;
+                }
+            }
+        };
+
+        struct StartPointComp {
+            bool operator()(const Interval& lhs, const Interval& rhs) {
+                return lhs.ranges.front().first < rhs.ranges.front().first;
+            }
+        };
+
+        struct EndPointComp {
+            bool operator()(const Interval& lhs, const Interval& rhs) {
+                return lhs.ranges.back().second < rhs.ranges.back().second;
+            }
+        };
+
+        typedef std::vector<Interval> Intervals;
+        typedef std::vector<MachineBasicBlock*> MachineBasicBlockPtrs;
+
+    private:
+        MachineFunction* mf_;
+        const TargetMachine* tm_;
+        const MRegisterInfo* mri_;
+        MachineBasicBlock* currentMbb_;
+        MachineBasicBlock::iterator currentInstr_;
+        LiveVariables* lv_;
+
+        std::vector<bool> allocatableRegisters_;
+
+        typedef std::map<unsigned, MachineBasicBlock*> MbbIndex2MbbMap;
+        MbbIndex2MbbMap mbbi2mbbMap_;
+
+        typedef std::map<MachineInstr*, unsigned> Mi2IndexMap;
+        Mi2IndexMap mi2iMap_;
+
+        typedef std::map<unsigned, unsigned> Reg2Interv