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authorEvan Cheng <evan.cheng@apple.com>2007-02-02 08:58:48 +0000
committerEvan Cheng <evan.cheng@apple.com>2007-02-02 08:58:48 +0000
commitf48ae3353eafcd9f5dd26fd9d76d87674328b78e (patch)
tree02612c89f0fcd8d53bac426e026f6593edee4c1f
parent0737c24053d88d47a1c5dc560dc97da49c1076ae (diff)
Ugh. Only meant to do this in thumb mode.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33780 91177308-0d34-0410-b5e6-96231b3b80d8
-rw-r--r--lib/Target/ARM/ARMRegisterInfo.cpp15
1 files changed, 10 insertions, 5 deletions
diff --git a/lib/Target/ARM/ARMRegisterInfo.cpp b/lib/Target/ARM/ARMRegisterInfo.cpp
index 9c9aef7599..94c10f1e3b 100644
--- a/lib/Target/ARM/ARMRegisterInfo.cpp
+++ b/lib/Target/ARM/ARMRegisterInfo.cpp
@@ -1159,12 +1159,17 @@ void ARMRegisterInfo::emitEpilogue(MachineFunction &MF,
}
if (VARegSaveSize) {
- // Epilogue for vararg functions: pop LR to R3 and branch off it.
- // FIXME: Verify this is still ok when R3 is no longer being reserved.
- BuildMI(MBB, MBBI, TII.get(ARM::tPOP)).addReg(ARM::R3);
+ if (isThumb)
+ // Epilogue for vararg functions: pop LR to R3 and branch off it.
+ // FIXME: Verify this is still ok when R3 is no longer being reserved.
+ BuildMI(MBB, MBBI, TII.get(ARM::tPOP)).addReg(ARM::R3);
+
emitSPUpdate(MBB, MBBI, VARegSaveSize, isThumb, TII);
- BuildMI(MBB, MBBI, TII.get(ARM::tBX_RET_vararg)).addReg(ARM::R3);
- MBB.erase(MBBI);
+
+ if (isThumb) {
+ BuildMI(MBB, MBBI, TII.get(ARM::tBX_RET_vararg)).addReg(ARM::R3);
+ MBB.erase(MBBI);
+ }
}
}