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authorBob Wilson <bob.wilson@apple.com>2009-10-27 19:52:03 +0000
committerBob Wilson <bob.wilson@apple.com>2009-10-27 19:52:03 +0000
commitf3b0d1a555eaa46931e4ec1b11e434e8cba2b5d7 (patch)
treefe8772855422da6aae1678b2f7dd4e0ded36791b
parentf9be95f867745b6754b2402b9b72f9eaeabd637f (diff)
Do not clear the "S" bit for RSCri and RSCrs. They inherit from the "sI"
instruction format that already takes care of setting this. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85280 91177308-0d34-0410-b5e6-96231b3b80d8
-rw-r--r--lib/Target/ARM/ARMInstrInfo.td2
1 files changed, 0 insertions, 2 deletions
diff --git a/lib/Target/ARM/ARMInstrInfo.td b/lib/Target/ARM/ARMInstrInfo.td
index 7ca9a64a8c..69e63b2cfd 100644
--- a/lib/Target/ARM/ARMInstrInfo.td
+++ b/lib/Target/ARM/ARMInstrInfo.td
@@ -1131,7 +1131,6 @@ def RSCri : AsI1<0b0111, (outs GPR:$dst), (ins GPR:$a, so_imm:$b),
DPFrm, IIC_iALUi, "rsc", "\t$dst, $a, $b",
[(set GPR:$dst, (sube so_imm:$b, GPR:$a))]>,
Requires<[IsARM, CarryDefIsUnused]> {
- let Inst{20} = 0;
let Inst{25} = 1;
}
def RSCrs : AsI1<0b0111, (outs GPR:$dst), (ins GPR:$a, so_reg:$b),
@@ -1140,7 +1139,6 @@ def RSCrs : AsI1<0b0111, (outs GPR:$dst), (ins GPR:$a, so_reg:$b),
Requires<[IsARM, CarryDefIsUnused]> {
let Inst{4} = 1;
let Inst{7} = 0;
- let Inst{20} = 0;
let Inst{25} = 0;
}
}