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| author | Andrew Lenharth <andrewl@lenharth.org> | 2005-03-22 16:42:52 +0000 |
|---|---|---|
| committer | Andrew Lenharth <andrewl@lenharth.org> | 2005-03-22 16:42:52 +0000 |
| commit | f29dc07aaed9eff098f4bf2134b45f53104a4502 (patch) | |
| tree | 0f4e1b49a8bb5ce8774eca0c9b3b93dde4561c4c | |
| parent | 6ae7e9837cd4261029d5a9d65ab8d3295b8884ed (diff) | |
hum, it is good to use real instructions
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@20769 91177308-0d34-0410-b5e6-96231b3b80d8
| -rw-r--r-- | lib/Target/Alpha/AlphaInstrInfo.td | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/lib/Target/Alpha/AlphaInstrInfo.td b/lib/Target/Alpha/AlphaInstrInfo.td index 1ac6650975..7789a10f3a 100644 --- a/lib/Target/Alpha/AlphaInstrInfo.td +++ b/lib/Target/Alpha/AlphaInstrInfo.td @@ -98,12 +98,12 @@ let isTwoAddress = 1 in { def CMOVEQ_FP : PseudoInstAlpha<(ops GPRC:$RDEST, GPRC:$RSRC_F, GPRC:$RSRC_T, FPRC:$RCOND), "fbne $RCOND, 42f\n\tbis $RSRC_T,$RSRC_T,$RDEST\n42:\n">; def CMOVEQi_FP : PseudoInstAlpha<(ops GPRC:$RDEST, GPRC:$RSRC_F, u8imm:$L, FPRC:$RCOND), - "fbne $RCOND, 42f\n\taddi $$31,$L,$RDEST\n42:\n">; + "fbne $RCOND, 42f\n\taddq $$31,$L,$RDEST\n42:\n">; def CMOVNE_FP : PseudoInstAlpha<(ops GPRC:$RDEST, GPRC:$RSRC_F, GPRC:$RSRC_T, FPRC:$RCOND), "fbeq $RCOND, 42f\n\tbis $RSRC_T,$RSRC_T,$RDEST\n42:\n">; def CMOVNEi_FP : PseudoInstAlpha<(ops GPRC:$RDEST, GPRC:$RSRC_F, u8imm:$L, FPRC:$RCOND), - "fbeq $RCOND, 42f\n\taddi $$31,$L,$RDEST\n42:\n">; + "fbeq $RCOND, 42f\n\taddq $$31,$L,$RDEST\n42:\n">; } |