diff options
author | Chris Lattner <sabre@nondot.org> | 2002-12-29 02:50:35 +0000 |
---|---|---|
committer | Chris Lattner <sabre@nondot.org> | 2002-12-29 02:50:35 +0000 |
commit | f27eeea54fb0176986f76731c499176345047dff (patch) | |
tree | 29c2196e780b52405bf44b094d64d8f98f0b3594 | |
parent | dde126207e2ee2ccd040684b010a694c679fa302 (diff) |
Rename MachineOptInfo to TargetoptInfo
Rename MachineCacheInfo to TargetCacheInfo
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@5203 91177308-0d34-0410-b5e6-96231b3b80d8
-rw-r--r-- | include/llvm/Target/TargetCacheInfo.h | 10 | ||||
-rw-r--r-- | include/llvm/Target/TargetMachine.h | 8 | ||||
-rw-r--r-- | include/llvm/Target/TargetOptInfo.h | 11 | ||||
-rw-r--r-- | lib/CodeGen/MachineFunction.cpp | 2 | ||||
-rw-r--r-- | lib/Target/SparcV9/SparcV9PeepholeOpts.cpp | 2 | ||||
-rw-r--r-- | lib/Target/TargetMachine.cpp | 8 | ||||
-rw-r--r-- | lib/Target/X86/X86TargetMachine.h | 4 |
7 files changed, 22 insertions, 23 deletions
diff --git a/include/llvm/Target/TargetCacheInfo.h b/include/llvm/Target/TargetCacheInfo.h index 3969e8e427..d83aac78b9 100644 --- a/include/llvm/Target/TargetCacheInfo.h +++ b/include/llvm/Target/TargetCacheInfo.h @@ -1,16 +1,16 @@ -//===-- llvm/Target/MachineCacheInfo.h --------------------------*- C++ -*-===// +//===-- llvm/Target/TargetCacheInfo.h ---------------------------*- C++ -*-===// // // Describes properties of the target cache architecture. // //===----------------------------------------------------------------------===// -#ifndef LLVM_TARGET_MACHINECACHEINFO_H -#define LLVM_TARGET_MACHINECACHEINFO_H +#ifndef LLVM_TARGET_TARGETCACHEINFO_H +#define LLVM_TARGET_TARGETCACHEINFO_H #include "Support/DataTypes.h" class TargetMachine; -struct MachineCacheInfo : public NonCopyableV { +struct TargetCacheInfo : public NonCopyableV { const TargetMachine ⌖ protected: unsigned int numLevels; @@ -19,7 +19,7 @@ protected: std::vector<unsigned short> cacheAssoc; public: - MachineCacheInfo(const TargetMachine& tgt) : target(tgt) { + TargetCacheInfo(const TargetMachine& tgt) : target(tgt) { Initialize(); } diff --git a/include/llvm/Target/TargetMachine.h b/include/llvm/Target/TargetMachine.h index 81300dbc9a..f7db820e6a 100644 --- a/include/llvm/Target/TargetMachine.h +++ b/include/llvm/Target/TargetMachine.h @@ -15,8 +15,8 @@ class MachineInstrDescriptor; class MachineSchedInfo; class MachineRegInfo; class TargetFrameInfo; -class MachineCacheInfo; -class MachineOptInfo; +class TargetCacheInfo; +class TargetOptInfo; class MachineCodeEmitter; class MRegisterInfo; class PassManager; @@ -60,8 +60,8 @@ public: virtual const MachineSchedInfo& getSchedInfo() const = 0; virtual const MachineRegInfo& getRegInfo() const = 0; virtual const TargetFrameInfo& getFrameInfo() const = 0; - virtual const MachineCacheInfo& getCacheInfo() const = 0; - virtual const MachineOptInfo& getOptInfo() const = 0; + virtual const TargetCacheInfo& getCacheInfo() const = 0; + virtual const TargetOptInfo& getOptInfo() const = 0; const TargetData &getTargetData() const { return DataLayout; } /// getRegisterInfo - If register information is available, return it. If diff --git a/include/llvm/Target/TargetOptInfo.h b/include/llvm/Target/TargetOptInfo.h index 2d80bf1fe4..295895e361 100644 --- a/include/llvm/Target/TargetOptInfo.h +++ b/include/llvm/Target/TargetOptInfo.h @@ -1,20 +1,19 @@ -//===-- llvm/Target/MachineOptInfo.h -----------------------------*- C++ -*-==// +//===-- llvm/Target/TargetOptInfo.h ------------------------------*- C++ -*-==// // -// Describes properties of the target cache architecture. // //===----------------------------------------------------------------------===// -#ifndef LLVM_TARGET_MACHINEOPTINFO_H -#define LLVM_TARGET_MACHINEOPTINFO_H +#ifndef LLVM_TARGET_TARGETOPTINFO_H +#define LLVM_TARGET_TARGETOPTINFO_H #include "Support/DataTypes.h" class TargetMachine; -struct MachineOptInfo : public NonCopyableV { +struct TargetOptInfo : public NonCopyableV { const TargetMachine ⌖ public: - MachineOptInfo(const TargetMachine& tgt): target(tgt) { } + TargetOptInfo(const TargetMachine& tgt): target(tgt) { } virtual bool IsUselessCopy (const MachineInstr* MI) const = 0; }; diff --git a/lib/CodeGen/MachineFunction.cpp b/lib/CodeGen/MachineFunction.cpp index 79886176cc..6763f10d60 100644 --- a/lib/CodeGen/MachineFunction.cpp +++ b/lib/CodeGen/MachineFunction.cpp @@ -14,7 +14,7 @@ #include "llvm/CodeGen/MachineFrameInfo.h" #include "llvm/Target/TargetMachine.h" #include "llvm/Target/TargetFrameInfo.h" -#include "llvm/Target/MachineCacheInfo.h" +#include "llvm/Target/TargetCacheInfo.h" #include "llvm/Function.h" #include "llvm/iOther.h" #include "llvm/Pass.h" diff --git a/lib/Target/SparcV9/SparcV9PeepholeOpts.cpp b/lib/Target/SparcV9/SparcV9PeepholeOpts.cpp index 21cc5d79e1..f255fb7f10 100644 --- a/lib/Target/SparcV9/SparcV9PeepholeOpts.cpp +++ b/lib/Target/SparcV9/SparcV9PeepholeOpts.cpp @@ -10,7 +10,7 @@ #include "llvm/CodeGen/MachineInstr.h" #include "llvm/Target/TargetMachine.h" #include "llvm/Target/MachineInstrInfo.h" -#include "llvm/Target/MachineOptInfo.h" +#include "llvm/Target/TargetOptInfo.h" #include "llvm/BasicBlock.h" #include "llvm/Pass.h" diff --git a/lib/Target/TargetMachine.cpp b/lib/Target/TargetMachine.cpp index f50580332a..dc722fc7e5 100644 --- a/lib/Target/TargetMachine.cpp +++ b/lib/Target/TargetMachine.cpp @@ -1,12 +1,12 @@ //===-- TargetMachine.cpp - General Target Information ---------------------==// // // This file describes the general parts of a Target machine. -// This file also implements MachineCacheInfo. +// This file also implements TargetCacheInfo. // //===----------------------------------------------------------------------===// #include "llvm/Target/TargetMachine.h" -#include "llvm/Target/MachineCacheInfo.h" +#include "llvm/Target/TargetCacheInfo.h" #include "llvm/Type.h" //--------------------------------------------------------------------------- @@ -36,13 +36,13 @@ unsigned TargetMachine::findOptimalStorageSize(const Type *Ty) const { //--------------------------------------------------------------------------- -// class MachineCacheInfo +// class TargetCacheInfo // // Purpose: // Describes properties of the target cache architecture. //--------------------------------------------------------------------------- -void MachineCacheInfo::Initialize() { +void TargetCacheInfo::Initialize() { numLevels = 2; cacheLineSizes.push_back(16); cacheLineSizes.push_back(32); cacheSizes.push_back(1 << 15); cacheSizes.push_back(1 << 20); diff --git a/lib/Target/X86/X86TargetMachine.h b/lib/Target/X86/X86TargetMachine.h index 15c8693de9..9bf9a3779e 100644 --- a/lib/Target/X86/X86TargetMachine.h +++ b/lib/Target/X86/X86TargetMachine.h @@ -25,8 +25,8 @@ public: virtual const MachineSchedInfo &getSchedInfo() const { abort(); } virtual const MachineRegInfo &getRegInfo() const { abort(); } - virtual const MachineCacheInfo &getCacheInfo() const { abort(); } - virtual const MachineOptInfo &getOptInfo() const { abort(); } + virtual const TargetCacheInfo &getCacheInfo() const { abort(); } + virtual const TargetOptInfo &getOptInfo() const { abort(); } /// addPassesToJITCompile - Add passes to the specified pass manager to /// implement a fast dynamic compiler for this target. Return true if this is |